Functions / Requirements of Direct-Off-Line SMPS -- ANTISATURATION TECHNIQUES FOR HIGH-VOLTAGE TRANSISTORS

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1 INTRODUCTION

In high-voltage bipolar switching transistors, whereas the "fall time" (speed or dv/dt of the turn-off edge) is mainly determined by the shape of the base drive current turnoff characteristic, the storage time (delay between the application of the base turn-off drive and the start of the turn-off edge) is dependent on the minority carrier concentration in the base region immediately prior to turn-off action.

The storage time will be minimized by minimizing the minority carrier concentration, that is, by ensuring that the base current is only just sufficient to maintain the transistor in a quasi-saturated state prior to turn-off.

One method often used to achieve this is the "Baker (diode) clamp." This circuit has the advantage that, because it is an active drive clamp (with negative feedback), it compensates for the inevitable variations in gain and saturation voltage of the various devices. Also, it responds to changes of parameters within the switching transistor that occur as a result of temperature and load variations.

2 BAKER CLAMP

Figure 1 shows a typical Baker clamp circuit. It operates as follows.

Diodes D1 and D2, in series with the base drive to Q1, provide a voltage drop in addition to the transistor Vbe, so that the drive voltage at node A will rise to approximately 2 V when Q1 is driven on.

As Q1 turns on, the voltage on its collector will fall toward zero. When the voltage reaches approximately 1.3 V, diode D3 will conduct and divert drive current away from the base and into the collector of Q1. As this clamping action is subject to negative feedback, it will self-adjust until the collector voltage is effectively clamped at 1.3 V.

As a result, the transistor is maintained in a quasi-saturated "on" state with just sufficient base drive current to maintain this condition. This quasi-saturated state maintains minimum minority carriers in the base region during the "on" period, giving minimum storage time during the turn-off action. During turn-off, D4 provides a path to Q1 base for the reverse turn-off current.

The number of series diodes in the base circuit, D1, D2, ... Dn, will be selected to suit the transistor saturation voltage. The clamp voltage must be above the normal saturation voltage of the transistor at the working current, to ensure that true transistor action is maintained in the quasi-saturated "on" state.

A disadvantage of the technique is that the collector voltage during the "on" period is somewhat larger than it would be for a fully saturated state, which increases the power loss in the transistor.

The Baker clamp arrangement combines ideally with the low-loss "Weaving snubber diode" here .


FIG. 1 "Baker clamp" antisaturation drive clamp circuit.

3 QUIZ

1. What would be the main advantage of using an antisaturation drive technique in high voltage switching transistor applications?

2. Describe the action of a typical antisaturation clamp circuit used for bipolar transistors.

Also see: Our other Switching Power Supply Guide

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