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. 1 As previously mentioned, the "direct-off-line" switchmode supply is so called because it takes its power input directly from the ac power lines, without using the rather large low frequency (50-60 Hz) isolation transformer normally found in linear power supplies. In the switchmode system, the input-to-output galvanic isolation is provided by a much smaller high-frequency transformer, driven by a semiconductor inverter circuit so as to provide some form of DC-to-DC conversion. To provide a DC input to the converter, it is normal practice to rectify and smooth the 50/60-Hz ac supply, using semiconductor power rectifiers and large electrolytic capacitors. (Exceptions to this would be special low distortion systems, in which input boost regulators are used to improve the power factor. These special systems will not be considered here.) For dual input voltage operation (nominally 120/240 V ac), it is common practice to use a full-bridge rectifier for the high-input-voltage conditions, and various link arrangements to obtain voltage doubler action for the low-input-voltage conditions. Using this approach, the high-frequency DC-to-DC converter can be designed for a nominal DC input of approximately 310 V for both input voltages. An important aspect of the system design is the correct sizing of input inductors, rectifier current ratings, input switch ratings, filter component size, and input fuse ratings. To size these components correctly, a full knowledge of the relevant applied stress is required. For example, to size the rectifier diodes, input fuses, and filter inductors correctly, the values of peak and rms input currents will be required, while the correct sizing of reservoir and/or filter capacitors requires the effective rms capacitor current. However, these stress values are in turn a function of source resistance, loading, and actual component values. A rigorous mathematical analysis of the input rectifier and filter is possible, but tedious. Further, previous graphical methods assume a fixed load resistance with an exponential capacitor discharge. In power supply applications, the load applied to the capacitor input filter is the input loading of the regulated DC-to-DC converter section. This is a constant-power load in the case of a switching regulator, or a constant-current load in the case of a linear regulator. Hence, this previous work is not directly applicable except where ripple voltages are relatively small. Note: A constant-power load takes an increasing current as the input voltage falls, the reverse of a resistive load. To meet this sizing need, a number of graphs have been empirically developed from actual system measurements. These will assist the designer in the initial component selection. 2 Figure 6.1 shows a typical dual-voltage rectifier capacitor input filter circuit. A link option LK1 is provided, which allows the rectifier capacitor circuit to be configured as a voltage doubler for 120-V operation or as a bridge rectifier for 240-V operation. The basic rectifier capacitor input filter and energy storage circuit (C5, C6, and D1 through D4) has been supplemented with an input fuse, an inrush-limiting thermistor NTC1, and a high frequency noise filter (L1, L2, L3, C1, C2, C3, and C4). For 240-V operation, the link LK1 will not be fitted, and diodes D1 through D4 act as a full-bridge rectifier. This will provide approximately 310 V DC to the constant-power DC-to-DC converter load. Low-frequency smoothing is provided by capacitors C5 and C6, which act in series across the load. For 120-V operation, the link LK1 is fitted, connecting diodes D3 and D4 in parallel with C5 and C6. Since these diodes now remain reverse-biased throughout the cycle, they are no longer active. However, during a positive half cycle, D1 conducts to charge C5 (top positive), and during a negative half cycle, D2 conducts to charge C6 (bottom negative). Since C5 and C6 are in series when the diodes are off, the output voltage is the sum of the two capacitor voltages, giving the required voltage doubling. (In this configuration, the voltage doubler can be considered as two half-wave rectifier circuits in series, with alternate half cycle charging for the reservoir capacitors.) 3 The effective series resistance Rs is made up of all the various series components, including the prime power source resistance, which appear between the prime power source voltage and the reservoir capacitors C5 and C6. To simplify the analysis, the various resistances are lumped into a single effective resistance Rs. To further reduce peak currents, additional series resistance may be added to provide a final optimum effective series resistance. It will be shown that the performance of the rectifier capacitor input filter and energy storage circuit is very much dependent on this final optimum effective series resistance. A simplified version of the bridge circuit is shown in Fig. .6.2. In this simplified circuit, the series reservoir capacitors C5 and C6 are replaced by their equivalent capacitance Ce, and the effective series resistance Rs has been positioned on the output side of the bridge rectifier to further ease the analysis. In the example shown in Fig. .6.2, the effective series resistance Rs is made up as follows: The prime source resistance Rs` is the resistance of the power supply line itself. Its value will depend on the location of the supply, the size of utility transformer, and the distance from the service entrance. Values between 20 and 600 m7 have been found in typical industrial and office locations. Although this may appear to be quite low, it can still have a significant effect in large power systems. In any event, the value of the source resistance is generally outside the control of the power supply designer, and at least this range must be accommodated by any practical supply design. A second and usually larger series resistance component is usually introduced by the input fuse, filter inductors, rectifier diodes, and inrush-limiting devices. In the 100-W example shown in Fig. .6.1, the inrush-limiting thermistor NTC1 is the major contributor, with a typical "hot resistance" of 1 ohm. In higher-power supplies, the inrush-limiting resistor or thermistor will often be shorted out by a triac or SCR after initial start-up, to reduce the source resistance and power loss. 4 By design, the switchmode power supply will maintain its output voltage constant for a wide range of input voltages. Since the output voltage is fixed, under steady loading conditions, the output power remains constant as the input voltage changes. Hence, since the converter efficiency also remains nearly constant, so does the converter input power. In order to maintain constant input power as the input voltage to the converter falls, the input current must rise. Thus the voltage discharge characteristic VCe of the storage capacitor Ce is like a reverse exponential, the voltage starting at its maximum initial value Vi after a diode conduction period. where Ce =_ storage capacitor value (µF) VCe _= voltage across Ce Vi = _ initial voltage on Ce at t2 P _ = converter load power t =_ time (µs) between t2 and t3 This characteristic is shown by the solid discharge lines VCe1 or VCe2 in the period t2-t3 in Fig. .6.3.
5 To complete the picture, a linear regulator must also maintain the output voltage constant as the regulator input voltage falls, between diode conduction periods. However, in the case of the linear regulator, the input current is the same as the output current, and it remains constant as the input voltage falls. Hence, for the linear regulator, the capacitor discharge characteristic is linear rather than an inverted exponential. 6 Figure .6.3a shows the familiar full-wave rectifier waveforms that would be obtained from the circuit shown in Fig. .6.2. The dashed waveform is the half sinusoidal rectified voltage across points A-B (assuming zero diode drop). The solid line shows the capacitor voltage VCe1 or VCe2 across points C-B as applied to the load. (In this case the load is the input of the regulated DC-to-DC converter section.) When the voltage applied to the bridge rectifier exceeds the actual capacitor voltage (time t1), the rectifier diodes become forward-biased, and current flows via Rs to supply the load and charge capacitor Ce. During the conduction period (t1-t2), a large current flows in the rectifier diodes, input circuit, and reservoir capacitors; hence capacitor Ce will charge toward the peak voltage of the supply. However, at t2, the applied voltage falls below the capacitor voltage, the rectifier diodes are blocked, and the input current falls to zero. Figure 1.6.3b shows the input current waveforms, and 1.6.3c, the capacitor current waveform. During the period t2-t3, the load current is supplied entirely from the storage capacitor Ce, partly discharging it. As the voltage falls, the load current increases, increasing the rate of volt age decay. At t3, the supply voltage again exceeds the capacitor voltage, and the cycle repeats. It should be noticed that the peak capacitor voltage is always less than the applied peak voltage as a result of the inevitable voltage drop across Rs and the rectifier diodes. This voltage drop is a function of load current and the value of Rs. Figure 6.3 shows (dashed line) that increasing the effective series resistance from its mini mum to some higher value will slightly increase the voltage drop to VCe2. This will reduce the peak current and increase the conduction angle of the rectifier diodes. The considerably reduced diode peak currents reduce input wiring and filter I^2 R losses and improve the power factor. The peak-peak ripple voltage is mainly a function of the capacitor size and load current. It is only slightly changed by the increased effective series resistance Rs. The capacitor ripple current is shown in Fig. .6.3c. During the conduction period (t1-t2), the capacitor Ce is charging (shown as a positive current excursion); during the following diode blocking period (t2-t3),Ce discharges. The peak and rms capacitor currents are a function of load, capacitor size, and the value of Rs. Under steady-state conditions, the area B (under the zero line) must equal the area A (above the line) to maintain the mean voltage across Ce constant. 7 From Fig. .6.3, it should be clear that even if the input voltage remains sinusoidal, the input current will be very distorted, with large peak values. This distorted current waveform results in increased input I^2 R power loss and low input power factors. Further, a large ripple current will flow in the filter capacitors.
Figures 6.4, .6.5, and 6.6 show how the rms input currents, rms capacitor currents, and peak capacitor currents are related to input power, with the value of the effective resistance factor Rsf as a parameter in typical applications. This information will be found useful for the correct sizing of the input components. (See Sec. 6.10.) 8 In Figs. 6.4, 6.5, and 6.6, the rms input, peak, and ripple currents are all given as a ratio of "calculated effective input current" Ie: where Ie =_ calculated effective input current, A rms Pin _= calculated (or measured) input power, W Vin =_ supply voltage, rms Note: Ie is thus the calculated "real" component of input current (the component which produces the real power). Because of the large harmonic component in the distorted input current, the measured input rms current will be larger by an amount defined by the power factor Pf (approximately 0.63 in the case of a capacitor input filter). Note: Although "power factor" Pf is normally defined as: true input power input VA product in the case of the "direct-off-line" rectifier capacitor input filter, the low source resistance of the supply ensures that the input voltage remains near constant and free of distortion. Hence the power factor may be defined as the ratio of the effective input current to the rms input current, i.e., _ in(rms) 9 As previously mentioned, the effective series resistance Rs is made up of a number of factors, some of which are outside the designer's control. A large series inrush-limiting resistance has the advantage of reducing peak repetitive and inrush currents, reducing the stress on rectifier diodes, storage capacitor, and filter components. This gives a better power factor. However, it also results in a larger total power loss, reduced overall efficiency, and reduced output voltage regulation. The inrush-limiting resistance is often a compromise selection. In low-power applications, where an inrush-limiting thermistor is used, this will usually provide sufficient "hot resistance" to limit peak currents and give the required performance. In high-power applications, where low-resistance triac or SCR inrush limiting is used, the input filter inductor often becomes the predominant series resistance and is wound to give the required resistance. The maximum value of this inductor resistance will then be limited by the permitted inductor temperature rise. However, this power loss limited approach to the inductor design has the advantage of permitting the maximum number of turns to be wound on the core, giving the maximum inductance on the selected core size. (See Sections 1, 2, and 3 in Part 3.) 10 In Figs.6.4, 6.5, and 6.6, the effective series resistance Rs has been converted to a resistance factor Rsf for more universal application, in which RR sf s _ ` r output power If specifications call for a power factor better than 0.6, it may be necessary to supplement the normal source resistance with an additional series power resistor. This has a penalty of increased power loss, with an inevitable decrease in overall efficiency. For power factors better than 0.7, a low-frequency choke input filter may be required. (Special continuous conduction boost regulator input circuits may be required in some applications.) 11 The following example will serve to demonstrate the use of the graphs. Question: For a 110-V, 250-W, 70% efficient "off-line" switchmode power supply using a rectifier capacitor input filter and a voltage doubler circuit, establish the fuse rating, mini mum capacitor size, rms input current, and peak and rms capacitor currents. Note: For a voltage doubler circuit, Fig. .6.1, the recommended minimum capacitor values are 3 µF/W (see Sec. 6.12), giving a value of 750 µF minimum for each capacitor C5 and C6. Input Power Pin Assuming an efficiency of 70%, the input power Pin to the converter (and filter) will be Effective Input Current Ie For an input voltage of 110 V, the effective input current Ie will be .... Input Resistance Factor Rsf Assuming a typical total effective input resistance Rs of 0.42 7, the resistance factor Rsf will be RMS Input Current Iin(rms) Entering Fig. .6.4 with 100% load and a resistance factor Rsf of 150 yields the ratio Iin(rms)/Ie _ 1.48; hence Iin Arms _r_ 325 148 48 .. . This rms input current defines the continuous-current rating of the input fuse at 110 V input. It is also used for the selection and losses of the input filter inductors. (Note that if the minimum input voltage is to be less than 110 V, the calculation will be done for the lowest input voltage.) RMS Capacitor Current Icap(rms) Using the same 100% load and resistance factors in the voltage doubler connection, Fig. .6.5 gives the ratio Icap(rms)/Ie _ 1 at full load; hence The capacitors must be chosen to meet or exceed this ripple current requirement. Peak Input Current Ipeak From Fig. .6.6, at full load, the ratio of Ipeak/Ie _ 4.6, giving a peak input current of 15A. The rectifier diodes must be chosen to meet this peak repetitive current and the rms input current needs. 12 It has been shown that provided that the product WCR eL _ 50 Hz, the DC output voltage of the rectifier capacitor input filter (with a resistive load) is defined mainly by the effective series resistance Rs` and load power. However, when the ripple voltage is low, this criterion also holds for the nonlinear converter-type load. Figures .6.7 and .6.8 show the mean DC output voltage of the rectifier capacitive input filter as a function of load power and input rms voltage up to 1000 W, with series resistance Rs` as a parameter. FIG. .6.7Mean DC output voltage of a full-wave bridge-rectified capacitor input filter as a function of load power, with effective source resistance as a parameter. (Valid for capacitor values of 1.5 µF/W or greater.) FIG. .6.8 Mean DC output voltage of a voltage doubler capacitor input filter as a function of load power, with effective source resistance as a parameter. (Valid for capacitor values of 3 µF/W or greater.) To maintain WCR eL _ 50 Hz, the effective filter capacitor Ce must be 1.5 µF/W or greater (3 µF/W for C5 and C6 in the voltage doubler connection, in which case Ce is made up of C5 and C6 in series). In general, this value of capacitance will also meet ripple current and holdup time requirements. 13 Consider the previous example for a 250-W unit. The input power is 357 W, and a voltage doubler circuit is to be used at 110 V input. The total series resistance Rs is 0.5 n, and, as previously shown, two capacitors of at least 750 µF will be used (in series). Filter DC Output Voltage Vout(DC) From Fig. .6.8, entering with a power of 357 W, the 0.5-7 Rs` line yields the ratio Vout(DC)/Vin(rms) _ 2.6. Hence the DC voltage is 2.6 × 110 = 286 V DC The ratio improves at lower powers, and the voltage regulation may be obtained by calculating the output voltage at lower powers in a similar way. 14 In the above example, the reservoir and/or filter capacitor values were chosen to meet the rather simplistic Ce _ 1.5 µF/W criterion indicated in Sec. 6.12. In practice, one or more of the following five major factors may control the selection: RMS ripple current rating Ripple voltage Voltage rating Size and cost Holdup time RMS Ripple Current Rating This rating must be satisfied to prevent excessive temperature rise in the capacitor and possible premature failure. (See Part 3, Section 12.) The problem at this stage is to know what value of rms ripple current applies. As shown previously, the ripple current is a function of capacitor value, total series resistance Rs, load, and input voltage. However, Fig. .6.5 shows the measured rms ripple current as a ratio of the "effective input current" Ie , for a range of load and source resistances, assuming that the capacitor value Ce is not less than 1.5 µF/W (3 µF/W for C5 and C6). Note: The "effective input current" is the calculated "real" component of input current, not the measured (or calculated) rms input current; hence Ie _ true input power rms input voltage The rms input current will be greater than Ie because of the low power factor (approximately 0.63) of the rectifier capacitor input filter circuit. Although in Fig. .6.5 the ratio Ic /Ie appears lower in the voltage-doubled mode, the actual ripple current will be greater, as Ie is approximately twice the value for the same output power in this mode. (If in doubt for a particular application, check the capacitor rms current using a low-resistance true rms current meter with a high crest factor rating. See Part 3, Sections 12, 13, and 14.)
This requirement will often define the minimum capacitor value when holdup time requirements are short (less than 1 cycle duration). Large ripple voltages on Ce will reduce the range of input voltages that can be accommodated by the converter. They may also give excessive output ripple (depending on the design). Typically, switchmode designs aim for input ripple voltage of less than 10% of VDC (say 30 Vp-p). The ripple voltage will be maximum at minimum supply voltage, as a result of the increase of input current.
Selecting Ce to satisfy a particular ripple voltage limit: Consider a requirement where the primary filter ripple voltage is not to exceed 10% of VDC for a 100-W supply, designed for a minimum input of 170 V rms at 60 Hz when the overall efficiency is 70%, with the effective series source resistance Rs _ 2 7. At 100 W output, with an efficiency of 70% the input power will be 143 W. From Fig. .6.7, at 143 W and Rs _ 2 7 in the bridge-connected mode, the ratio Vout(DC)/Vin(rms) _ 1.32, and the header voltage VDC at 170 V rms input will be 1.32 r 170 _ 224 V (DC). The converter input power is 143 W, giving an effective DC converter input current of P/VDC _ 143/224 or 0.64 A (DC). Extrapolating from Fig. .6.3, the capacitor discharge period is approximately 6 ms at 60 Hz. Since the ripple voltage is small (10% or 23 V in this example), a linear discharge will be assumed over the discharge period. With these approximations, a simple linear equation may be used to establish the approximate value of Ce that will give the required 10% ripple voltage: where Ce _ effective capacitor value, MF (effective value of C1 and C2 in series) I _ converter input DC current, A (0.64 A in this example) $t _ discharge period, s (6 ms in this example) $v _ peak-peak ripple voltage, V (in this case 10% VDC _ 22.4 Vp-p) Since two capacitors are to be used in series, each capacitor will be 342 µF minimum. In this example, the capacitors' values exceed the minimum 3 µF/W criterion but are not clearly oversize. Hence, the ripple voltage needs may not be the dominant factor, and the ripple current rating and holdup time should also be checked.
This is perhaps an obvious parameter, but remember to consider maximum input voltages and minimum loads. Also, the voltage margin should include an allowance for temperature derating and required MTBF derating needs.
High-voltage high-capacity electrolytic capacitors are expensive and large. It is not cost effective to use oversize components.
Holdup time is the minimum time period for which the supply will maintain the output voltages within their output regulation limits when the input supply is removed or falls below the input regulation limits. Although "holdup time" has been considered last, it is often the dominant factor and may even be the main reason that a switchmode supply was chosen. In spite of its obvious importance, holdup time is often poorly specified. This parameter is a function of the size of the storage capacitor Ce, the applied load, the voltage on the capacitor at the time of line failure, and the design of the supply (dropout voltage). Note: It is difficult, inefficient, and expensive to design for a very low dropout voltage. It is clearly very important to define the loading conditions, output voltage, and supply voltage immediately prior to failure when specifying holdup time. It has become the industry standard to assume nominal input voltage and full-load operation unless otherwise stated in the specifications. In critical computer and control applications, it may be essential to provide a specified minimum holdup time from full-load and minimum input voltage conditions. If this is the real requirement, then it must be specified, as it has a major impact on the size and cost of the reservoir capacitors and will become the dominant selection factor. (Because of the higher cost, very few "standard off-the-shelf " supplies meet this second condition.) In either case, if the holdup time exceeds 20 ms, it will probably be the dominant capacitor sizing factor, and Ce will be evaluated to meet this need. In this case, the minimum reservoir capacitor size Ce(min) is calculated on the basis of energy storage requirements as follows: Let: C _ minimum effective reservoir capacitor size, MF E _ output energy used during holdup time (output power × holdup time) Ei = _ input energy used during holdup time (Eo/efficiency) Vs _ DC voltage on reservoir capacitor (at start of line failure) Ecs _ energy stored in reservoir capacitor (at start of line failure) Vf = _ voltage on reservoir capacitor (at power supply drop-out) Eef = _ energy remaining in reservoir capacitor (at power supply dropout) Energy used Ei _ energy removed from capacitor Example: Calculate the minimum reservoir capacitor value Ce to provide 42 ms of holdup time at an output power of 90 W. The minimum input voltage prior to failure is to be 190 V. The supply is designed for 230-V rms nominal input, with the link position selected for bridge operation. The efficiency is 70%, and the power supply drop-out input voltage is 152 V rms. The effective series resistance in the input filter (Rs) is 1 ohm. Since the failure may occur at the end of a normal half cycle quiescent period, the capacitor may have already been discharging for 8 ms, so the worst-case discharge period can be (42 8) _ 50 ms. This period must be used in the calculation. From Fig. .6.7, the DC voltage across the two series storage capacitors C5 and C6 prior to line failure and at drop-out will be During this period the energy used by the supply Ei Output power time Efficiency % Therefore Ce(min) Since two capacitors in series are to be used for Ce, the value must be doubled, giving two capacitors of 1094 µF minimum. To allow for tolerance and end-of-life degrading, two standard 1500-µF capacitors would probably be used in this example. It is clear that this is a very large capacitance for a 90-W power supply and that it is more than adequate to meet ripple current and ripple voltage requirements. This capacitor choice is clearly dominated by the holdup time needs. 15 It has been shown in Fig. .6.4 that the rms input current is a function of load, source resistance Rs, and storage capacitor value. It is maximum at low input voltages. It is the rms input current that causes fuse element heating and hence defines the fuse's continuous rating. Further, the fuse must withstand the inrush current on initial switch-on at maximum input voltage. Procedure: Select the input fuse continuous rms current rating as defined by Fig. .6.4, allowing a 50% margin for aging effects. Select the I^2 t rating to meet the inrush needs as defined in Part 1, Section 7. 16 From Fig. .6.3, it can be seen that the input voltage is only slightly distorted by the very nonlinear load of the capacitor input filter. The sinusoidal input is maintained because the line input resistance is very low. The input current, however, is very distorted and discontinuous, but superficially would appear to be a part sine wave in phase with the voltage. This leads to a common error: The product Vin(rms) r Iin(rms) is assumed to give input power. This is not so! This product is the input volt-ampere product; it must be multiplied by the power factor (typically 0.6 for a capacitor input filter) to get true power. The reason for the low power factor is that the nonsinusoidal current waveform contains a large odd harmonic content, and the phase and amplitude of all harmonics must be included in the measurement. The input power is best measured with a true wattmeter with a bandwidth exceeding 1 kHz. Many moving-coil dynamometer instruments are suitable; however, beware of instruments containing iron, as these can give considerable errors at the higher harmonic frequencies. Modern digital instruments are usually suitable, provided that the bandwidth is large, they have a large crest factor, and true rms sensing is provided. Again beware of instruments which are peak or mean sensing, but rms calibrated, as these will read correctly only for true sine-wave inputs. (Rectified moving-coil instruments fall into this category.) When making efficiency measurements, remember that you are comparing two large numbers with only a small difference. It is the difference which defines the power loss in the system, and a small error in any reading can give a large error in the apparent loss. Figure 6.9 shows the possible error range as a function of real efficiency when the input and output measurements have a possible error in the range of only 2%. In a multiple-output power supply, many instruments may be used and the potential for error is large. When using electrodynamic or dynamometer wattmeters, do not neglect the wattmeter burden, which is always present. This error cannot be eliminated by calibration, as it depends on the relative ratio of current to voltage, and this changes with each measurement. It also depends on the way the instrument is set up. (In general, the current shunt or coil should precede the voltage terminals for high-current, low-voltage measurements, and the reverse applies for low-current, high-voltage measurements.) FIG. .6.9 Possible range of error of internal power loss and efficiency calculations as a function of real efficiency, with a measurement error of 2%. 17 1. Why are capacitive input filters often used for direct-off-line switchmode supplies? 2. What are the major disadvantages of the capacitive input filter? 3. What is the typical power factor of a capacitive input filter, and why is it relatively poor? 4. Why must a true wattmeter be used for measuring input power? 5. Why is line inrush-current limiting required with capacitive input filter circuits? 6. Why is the input reservoir capacitor ripple current so important in the selection of input capacitor types? 7. What parameters are important in the selection of input rectifiers for capacitive input filters? 8. How can the power factor of a capacitive input filter be improved? 9. Using the nomograms shown in Fig. .6.9, establish the minimum input fuse rating, reservoir capacitor value, reservoir ripple current, peak current in the rectifier diodes, filter DC output voltage at full load, and voltage regulation at 10% to full load. (Assume that the output power is 150 W and the total source resistance including the inrush-limiting resistance is 0.75 ohm, the supply voltage is 100 V rms, the efficiency is 75%, and a voltage doubler circuit as shown in Fig. .6.8 is used.) 10. Calculate the minimum value of the reservoir capacitor needed to give a holdup time of one half cycle at 60 Hz if the SMPS is 70% efficient and the output power is to be 200 W. (Assume that the supply voltage just before line failure is 90 V rms and the dropout voltage is 80 V rms. The supply has a voltage doubler input as shown in Fig. .6.8, and the source resistance Rsf is 0.5 ohm.)
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