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Typically a sensor cannot be directly connected to the instruments that record, monitor, or process its signal, because the signal may be incompatible or may be too weak and/or noisy. The signal must be conditioned--i.e., cleaned up, amplified, and put into a compatible format.
The following sections discuss the important aspects of sensor signal conditioning.
Conditioning Bridge Circuits
This section discusses the fundamental concepts of bridge circuits. Resistive elements are some of the most common sensors. They are inexpensive to manufacture and relatively easy to interface with signal conditioning circuits. Resistive elements can be made sensitive to temperature, strain (by pressure or by flex), and light. Using these basic elements, many complex physical phenomena can be measured, such as fluid or mass flow (by sensing the temperature difference between two calibrated resistances) and dew-point humidity (by measuring two different temperature points), etc. Bridge circuits are often incorporated into force, pressure and acceleration sensors.
Sensor elements' resistances can range from less than 100 ohm to several hundred k-ohm, depending on the sensor design and the physical environment to be measured. E.g., RTDs (resistance temperature devices) are typically 100 ohm or 1000 ohm. Thermistors are typically 3500 ohm or higher.
Resistive sensors such as RTDs and strain gages produce small percentage changes in resistance in response to a change in a physical variable such as temperature or force.
Platinum RTDs have a temperature coefficient of about 0.385%/°C. Thus, in order to accurately resolve temperature to 1°C, the measurement accuracy must be much better than 0.385 ohm, for a 100 ohm RTD.
Strain gages present a significant measurement challenge because the typical change in resistance over the entire operating range of a strain gage may be less than 1% of the nominal resistance value. Accurately measuring small resistance changes is there fore critical when applying resistive sensors.
One technique for measuring resistance is to force a constant current through the resistive sensor and measure the voltage output. This requires both an accurate current source and an accurate means of measuring the voltage. Any change in the current will be interpreted as a resistance change. In addition, the power dissipation in the resistive sensor must be small, in accordance with the manufacturer's recommendations, so that self-heating does not produce errors, therefore the drive current must be small.
Bridges offer an attractive alternative for measuring small resistance changes accurately. The basic Wheat stone bridge (actually developed by S. H. Christie in 1833) is shown. It consists of four resistors connected to form a quadrilateral, a source of excitation (voltage or current) connected across one of the diagonals, and a voltage detector connected across the other diagonal.
The detector measures the difference between the outputs of two voltage dividers connected across the excitation.
A bridge measures resistance indirectly by comparison with a similar resistance. The two principal ways of operating a bridge are as a null detector or as a device that reads a difference directly as voltage.
When R1/R4 = R2/R3, the resistance bridge is at a null, regardless of the mode of excitation (current or voltage, AC or DC), the magnitude of excitation, the mode of readout (current or voltage), or the impedance of the detector. Therefore, if the ratio of R2/R3 is fixed at K, a null is achieved when R1 = K·R4. If R1 is unknown and R4 is an accurately determined variable resistance, the magnitude of R1 can be found by adjusting R4 until null is achieved. Conversely, in sensor-type measurements, R4 may be a fixed reference, and a null occurs when the magnitude of the external variable (strain, temperature, etc.) is such that R1 = K·R4.
Null measurements are principally used in feedback systems involving electromechanical and/or human elements. Such systems seek to force the active element (strain gage, RTD, thermistor, etc.) to balance the bridge by influencing the parameter being measured.
For the majority of sensor applications employing bridges, however, the deviation of one or more resistors in a bridge from an initial value is measured as an indication of the magnitude (or a change) in the measured variable. In this case, the output voltage change is an indication of the resistance change. Because very small resistance changes are common, the output voltage change may be as small as tens of millivolts, even with VB = 10 V (a typical excitation voltage for a load cell application).
In many bridge applications, there may be two, or even four, elements that vary.
ill.4 shows the four commonly used bridges suitable for sensor applications and the corresponding equations which relate the bridge output voltage to the excitation voltage and the bridge resistance values. In this case, we assume a constant voltage drive, VB. Note that since the bridge output is directly proportional to VB, the measurement accuracy can be no better than that of the accuracy of the excitation voltage.
A second configuration of the two-element varying bridge, Case (2), requires two identical elements that vary in opposite directions. This could correspond to two identical strain gages: one mounted on top of a flexing surface, and one on the bottom. Note that this configuration is linear, and like two-element Case (1), has twice the gain of the single-element configuration. Another way to view this configuration is to consider the terms R + fir and R - fir as comprising the two sections of a center tapped potentiometer.
The all-element varying bridge produces the most signal for a given resistance change and is inherently linear. It’s an industry-standard configuration for load cells which are constructed from four identical strain gages.
Bridges may also be driven from constant current sources as shown.
Current drive, although not as popular as voltage drive, has an advantage when the bridge is located remotely from the source of excitation because the wiring resistance does not introduce errors in the measurement. Note also that with constant current excitation, all configurations are linear with the exception of the single-element varying case.
In summary, there are many design issues relating to bridge circuits.
After selecting the basic configuration, the excitation method must be determined.
The value of the excitation voltage or current must first be determined. Recall that the full scale bridge output is directly proportional to the excitation voltage (or current). Typical bridge sensitivities are 1 mV/V to 10 mV/V. Although large excitation volt ages yield proportionally larger full scale output voltages, they also result in higher power dissipation and the possibility of sensor resistor self-heating errors. On the other hand, low values of excitation voltage require more gain in the conditioning circuits and increase the sensitivity to noise.
Regardless of its value, the stability of the excitation voltage or current directly affects the overall accuracy of the bridge output. Stable references and/or ratiometric techniques are required to maintain desired accuracy.
Amplifying and Linearizing Bridge Outputs
The output of a single-element varying bridge may be amplified by a single precision op-amp connected in the inverting mode as shown.
This circuit, although simple, has poor gain accuracy and also unbalances the bridge due to loading from RF and the op amp bias current. The RF resistors must be carefully chosen and matched to maximize the common mode rejection (CMR). Also it’s difficult to maximize the CMR while at the same time allowing different gain options. In addition, the output is nonlinear. The key redeeming feature of the circuit is that it’s capable of single supply operation and requires a single op amp. Note that the RF resistor connected to the non-inverting input is returned to VS/2 (rather than ground) so that both positive and negative values of fir can be accommodated, and the op amp output is referenced to VS/2.
A much better approach is to use an instrumentation amplifier (in-amp) as shown. This efficient circuit provides better gain accuracy (usually set with a single resistor, RG) and does not unbalance the bridge. Excellent common mode rejection can be achieved with modern in-amps. Due to the bridge's intrinsic characteristics, the output is nonlinear, but this can be corrected in the software (assuming that the in-amp output is digitized using an analog-to-digital converter and followed by a microcontroller or microprocessor).
Various techniques are avail able to linearize bridges, but it’s important to distinguish between the linearity of the bridge equation and the linearity of the sensor response to the phenomenon being sensed. E.g., if the active element is an RTD, the bridge used to implement the measurement might have perfectly adequate linearity; yet the output could still be nonlinear due to the RTD's nonlinearity. Manufacturers of sensors employing bridges address the nonlinearity issue in a variety of ways, including keeping the resistive swings in the bridge small, shaping complementary nonlinear response into the active elements of the bridge, using resistive trims for first-order corrections, and others.
ill.9 shows a single-element varying active bridge in which an op amp produces a forced null, by adding a voltage in series with the variable arm. That voltage is equal in magnitude and opposite in polarity to the incremental voltage across the varying element and is linear with fir. Since it’s an op amp output, it can be used as a low impedance output point for the bridge measurement. This active bridge has a gain of two over the standard single-element varying bridge, and the output is linear, even for large values of fir. Because of the small output signal, this bridge must usually be followed by a second amplifier.
The amplifier used in this circuit re quires dual supplies because its output must go negative.
Another circuit for linearizing a single element varying bridge is shown. The bottom of the bridge is driven by an op amp, which maintains a constant current in the varying resistance element. The output signal is taken from the right hand leg of the bridge and amplified by a non-inverting op amp. The output is linear, but the circuit requires two op amps which must operate on dual supplies. In addition, R1 and R2 must be matched for accurate gain.
A circuit for linearizing a voltage-driven two-element varying bridge is shown. This circuit is similar to ill.9 and has twice the sensitivity. A dual supply op amp is required. Additional gain may be necessary.
The two-element varying bridge circuit uses an op amp, a sense resistor, and a voltage reference to maintain a constant current through the bridge (I_B = V_REF/R_SENSE).
The current through each leg of the bridge remains constant (IB/2) as the resistances change; therefore the output is a linear function of fir. An instrumentation amplifier provides the additional gain. This circuit can be operated on a single supply with the proper choice of amplifiers and signal levels.
Wiring resistance and noise pickup are the biggest problems associated with remotely located bridges. ill.13 shows a 350 ohm strain gage which is connected to the rest of the bridge circuit by 100 feet of 30 gage twisted pair copper wire. The resistance of the wire at 25°C is 0.105 ohm/ft, or 10.5 ohm for 100 ft. The total lead resistance in series with the 350 ohm strain gage is therefore 21 ohm. The temperature coefficient of the copper wire is 0.385%/°C. Now we will calculate the gain and offset error in the bridge output due to a +10°C temperature rise in the cable. These calculations are easy to make, because the bridge output voltage is simply the difference between the output of two voltage dividers, each driven from a +10 V source.
The full-scale variation of the strain gage resistance (with flex) above its nominal 350 ohm value is +1% (+3.5 ohm), corresponding to a full-scale strain gage resistance of 353.5 ohm, which causes a bridge output voltage of +23.45 mV. Notice that the addition of the 21 ohm R_COMP resistor compensates for the wiring resistance and balances the bridge when the strain gage resistance is 350 ohm. Without R_COMP, the bridge would have an output offset voltage of 145.63 mV for a nominal strain gage resistance of 350 ohm. This offset could be compensated for in software just as easily, but for this example, we chose to do it with RCOMP.
Assume that the cable temperature increases +10°C above nominal room temperature.
This results in a total lead resistance increase of +0.404 ohm (10.5 ohm × 0.00385/°C × 10°C) in each lead. Note: The values in parentheses in the diagram indicate the values at +35°C. The total additional lead resistance (of the two leads) is +0.808 ohm. With no strain, this additional lead resistance produces an offset of +5.44 mV in the bridge output. Full-scale strain produces a bridge output of +28.83 mV (a change of +23.39 mV from no strain). Thus the increase in temperature produces an offset voltage error of +5.44 mV (+23% full scale) and a gain error of -0.06 mV (23.39 mV - 23.45 mV), or -0.26% full scale. Note that these errors are produced solely by the 30 gage wire, and don’t include any temperature coefficient errors in the strain gage itself.
The effects of wiring resistance on the bridge output can be minimized by the 3-wire connection shown. We assume that the bridge output voltage is measured by a high impedance device, therefore there is no current in the sense lead.
Note that the sense lead measures the voltage output of a divider: the top half is the bridge resistor plus the lead resistance, and the bottom half is strain gage resistance plus the lead resistance. The nominal sense voltage is there fore independent of the lead resistance. When the strain gage resistance increases to full scale (353.5 ohm,), the bridge output increases to +24.15 mV.
Increasing the temperature to +35°C increases the lead resistance by +0.404 ohm in each half of the divider. The full scale bridge output voltage decreases to +24.13 mV because of the small loss in sensitivity, but there is no offset error. The gain error due to the temperature increase of +10°C is therefore only -0.02 mV, or -0.08% of full scale. Compare this to the +23% full scale offset error and the -0.26% gain error for the two-wire connection shown.
The three-wire method works well for remotely located resistive elements which make up one leg of a single-element varying bridge. However, all-element varying bridges generally are housed in a complete assembly, as in the case of a load cell.
When these bridges are remotely located from the conditioning electronics, special techniques must be used to maintain accuracy.
Of particular concern is maintaining the accuracy and stability of the bridge excitation voltage. The bridge output is directly proportional to the excitation voltage, and any drift in the excitation voltage produces a corresponding drift in the output voltage.
For this reason, most all-element varying bridges (such as load cells) are six-lead assemblies: two leads for the bridge output, two leads for the bridge excitation, and two sense leads. This method (called Kelvin or 4-wire sensing) is shown. The sense lines go to high impedance op amp inputs, so there is minimal error due to the bias current induced voltage drop across their lead resistance. The op amps maintain the required excitation voltage to make the voltage measured between the sense leads always equal to VB. Although Kelvin sensing eliminates errors due to voltage drops in the wiring resistance, the drive voltages must still be highly stable since they directly affect the bridge output voltage. In addition, the op amps must have low offset, low drift, and low noise.
The constant current excitation method shown is another method for minimizing the effects of wiring resistance on the measurement accuracy. However, the accuracy of the reference, the sense resistor, and the op amp all influence the over all accuracy.
A very powerful ratiometric technique which includes Kelvin sensing to minimize errors due to wiring resistance and also eliminates the need for an accurate excitation voltage is shown. The AD7730 measurement ADC can be driven from a single supply voltage which is also used to excite the remote bridge. Both the analog input and the reference input to the ADC are high impedance and fully differential. By using the + and - SENSE outputs from the bridge as the differential reference to the ADC, there is no loss in measurement accuracy if the actual bridge excitation voltage varies. The AD7730 is one of a family of sigma-delta ADCs with high resolution (24 bits) and internal programmable gain amplifiers (PGAs) and is ideally suited for bridge applications. These ADCs have self- and system calibration features which allow offset and gain errors due to the ADC to be minimized.
E.g., the AD7730 has an offset drift of 5 nV/°C and a gain drift of 2 ppm/°C. Offset and gain errors can be reduced to a few microvolts using the system calibration feature.
Maintaining an accuracy of 0.1% or better with a full-scale bridge output voltage of 20 mV requires that the sum of all offset errors be less than 20 µV. ill.18 shows some typical sources of offset error that are inevitable in a system. Parasitic thermocouples whose junctions are at different temperatures can generate voltages between a few and tens of microvolts for a 1°C temperature differential. The diagram shows a typical parasitic junction formed between the cop per printed circuit board traces and the kovar pins of the IC amplifier.
This thermocouple voltage is about 35 µV/°C temperature differential.
The thermocouple voltage is significantly less when using a plastic package with a copper lead frame.
The amplifier offset voltage and bias current are other sources of offset error. The amplifier bias current must flow through the source impedance. Any unbalance in either the source resistances or the bias currents produce offset errors. In addition, the offset voltage and bias currents are a function of temperature. High performance low offset, low offset drift, low bias current, and low noise precision amplifiers are required. In some cases, chopper-stabilized amplifiers may be the only solution.
AC bridge excitation as shown can effectively remove offset voltages in series with the bridge output. The concept is simple. The net bridge output voltage is measured under two conditions as shown. The first measurement yields a measurement VA, where VA is the sum of the desired bridge output voltage VO and the net offset error voltage EOS. The polarity of the bridge excitation is reversed, and a second measurement VB is made. Subtracting VB from VA yields 2VO, and the offset error term EOS cancels as shown.
Obviously, this technique requires a highly accurate measurement ADC (such as the AD7730) as well as a microcontroller to perform the subtraction. If a ratiometric reference is desired, the ADC must also accommodate the changing polarity of the reference voltage. Again, the AD7730 includes this capability.
P-Channel and N-Channel MOSFETs can be configured as an AC bridge driver as shown. Dedicated bridge driver chips are also available, such as the Micrel MIC4427. Note that because of the on-resistance of the MOSFETs, Kelvin sensing must be used in these applications. It’s also important that the drive signals be non-overlapping to prevent excessive MOSFET switching currents. The AD7730 ADC has on chip circuitry to generate the required non-overlapping drive signals for AC excitation.
Amplifiers for Signal Conditioning
This section examines the critical parameters of amplifiers for use in precision signal conditioning applications. Offset voltages for precision IC op amps can be as low as 10 µV with corresponding temperature drifts of 0.1 µV/ºC. Chopper stabilized op amps provide offsets and offset voltage drifts which cannot be distinguished from noise. Open loop gains greater than 1 million are common, along with common mode and power supply rejection ratios of the same magnitude. Applying these precision amplifiers while maintaining the amplifier performance can present significant challenges to a design engineer, i.e., external passive component selection and PC board layout.
It’s important to understand that DC open-loop gain, offset voltage, power supply rejection (PSR), and common mode rejection (CMR) should not be the only considerations in selecting precision amplifiers. The AC performance of the amplifier is also important, even at "low" frequencies. Open-loop gain, PSR, and CMR all have relatively low corner frequencies, and therefore what may be considered "low" frequency may actually fall above these corner frequencies, increasing errors above the value predicted solely by the DC parameters. E.g., an amplifier having a DC open-loop gain of 10 million and a unity-gain crossover frequency of 1 MHz has a corresponding corner frequency of 0.1 Hz! One must therefore consider the open loop gain at the actual signal frequency. The relationship between the single-pole unity-gain crossover frequency, fu, the signal frequency, f_sig, and the open-loop gain AVOL(f_sig) (measured at the signal frequency) is given by:
A f f f VOL sig u sig ( ) =
In the example above, the open loop gain is 10 at 100 kHz, and 100,000 at 10 Hz.
Loss of open loop gain at the frequency of interest can introduce distortion, especially at audio frequencies. Loss of CMR or PSR at the line frequency or harmonics thereof can also introduce errors.
The challenge of selecting the right amplifier for a particular signal conditioning application has been complicated by the sheer proliferation of various types of amplifiers in various processes (Bipolar, Complementary Bipolar, BiFET, CMOS, BiCMOS, etc.) and architectures (traditional op amps, instrumentation amplifiers, chopper amplifiers, isolation amplifiers, etc.) In addition, a wide selection of precision amplifiers are now available which operate on single supply voltages, which complicates the design process even further because of the reduced signal swings and voltage input and output restrictions. Offset voltage and noise are now a more significant portion of the input signal. Selection guides and parametric search engines which can simplify this process somewhat are available on the Internet as well as on CD ROM. Other manufacturers have similar information available.
In this section, we will first look at some key performance specifications for precision op amps. Other amplifiers will then be examined such as instrumentation amplifiers, chopper amplifiers, and isolation amplifiers. The implications of single supply operation will be discussed in detail because of their significance in today's designs, which often operate from batteries or other low power sources.
Precision Op Amp Characteristics
Input Offset Voltage
Input offset voltage error is usually one of the largest error sources for precision amplifier circuit designs. However, it’s a systemic error and can usually be dealt with by using a manual offset null trim or by system calibration techniques using a microcontroller or microprocessor. Both solutions carry a cost penalty, and today's precision op amps offer initial offset voltages as low as 10 µV for bipolar devices, and far less for chopper stabilized amplifiers. With low offset amplifiers, it’s possible to eliminate the need for manual trims or system calibration routines.
Measuring input offset voltages of a few microvolts requires that the test circuit does not introduce more error than the offset voltage itself. ill.2 shows a circuit for measuring offset voltage. The circuit amplifies the input offset voltage by the noise gain (1001). The measurement is made at the amplifier output using an accurate digital voltmeter. The offset referred to the input (RTI) is calculated by dividing the output voltage by the noise gain.
The small source resistance seen at R1||R2 results in negligible bias current contribution to the measured offset voltage. E.g., 2 nA bias current flowing through the 10 ohm resistor produces a 0.02 µV error referred to the input.
As simple as it looks, this circuit may give inaccurate results. The largest potential source of error comes from parasitic thermocouple junctions formed where two different metals are joined. The thermocouple voltage formed by temperature difference between two junctions can range from 2 µV/ºC to more than 40 µV/ºC. Note that in the circuit additional resistors have been added to the non-inverting input in order to exactly match the thermocouple junctions in the inverting input path.
The accuracy of the measurement depends on the mechanical layout of the components and how they are placed on the PC board. Keep in mind that the two connections of a component such as a resistor create two equal, but opposite polarity thermoelectric voltages (assuming they are connected to the same metal, such as the copper trace on a PC board) which cancel each other assuming both are at exactly the same temperature.
Clean connections and short lead lengths help to minimize temperature gradients and increase the accuracy of the measurement.
Airflow should be minimal so that all the thermocouple junctions stabilize at the same temperature. In some cases, the circuit should be placed in a small closed container to eliminate the effects of external air currents. The circuit should be placed flat on a surface so that convection currents flow up and off the top of the board, not across the components as would be the case if the board was mounted vertically.
Measuring the offset voltage shift over temperature is an even more demanding challenge. Placing the printed circuit board containing the amplifier being tested in a small box or plastic bag with foam insulation prevents the temperature chamber air current from causing thermal gradients across the parasitic thermocouples. If cold testing is required, a dry nitrogen purge is recommended. Localized temperature cycling of the amplifier itself using a Thermostream-type heater/cooler may be an alternative. However, these units tend to generate quite a bit of airflow, which can be troublesome.
In addition to temperature related drift, the offset voltage of an amplifier changes as time passes. This aging effect is generally specified as long-term stability in µV/ month, or µV/1000 hours, but this is misleading. Since aging is a "drunkard's walk" phenomenon, it’s proportional to the square root of the elapsed time. An aging rate of 1 µV/1000 hours becomes about 3 µV/year, not 9 µV/year. Long-term stability of the OP177 and the AD707 is approximately 0.3 µV/month. This refers to a time period after the first 30 days of operation. Excluding the initial hour of operation, changes in the offset voltage of these devices during the first 30 days of operation are typically less than 2 µV.
As a general rule of thumb, it’s prudent to control amplifier offset voltage by device selection whenever possible, bus sometimes trim may be desired. Many precision op amps have pins available for optional offset null. Generally, two pins are joined by a potentiometer, and the wiper goes to one of the supplies through a resistor as shown. If the wiper is connected to the wrong supply, the op amp will probably be destroyed, so the data sheet instructions must be carefully observed! The range of offset adjustment in a precision op amp should be no more than two or three times the maximum offset voltage of the lowest grade device, in order to minimize the sensitivity of these pins. The voltage gain of an op amp between its offset adjustment pins and its output may actually be greater than the gain at its signal inputs! It’s therefore very important to keep these pins free of noise. It’s inadvisable to have long leads from an op amp to a remote potentiometer. To minimize any offset error due to supply current, connect R1 directly to the pertinent device supply pin, such as pin 7 shown in the diagram.
It’s important to note that the offset drift of an op amp with temperature will vary with the setting of its offset adjustment. In most cases a bipolar op amp will have minimum drift at minimum offset.
The offset adjustment pins should therefore be used only to adjust the op amp's own offset, not to correct any system offset errors, since this would be at the expense of increased temperature drift. The drift penalty for a JFET input op amp is much worse than for a bipolar input and is in the order of 4 µV/ºC for each millivolts of nulled offset voltage. It’s generally better to control the offset voltage by proper selection of devices and device grades. Dual, triple, quad, and single op amps in small pack ages don’t generally have null capability because of pin count limitations, and offset adjustments must be done elsewhere in the system when using these devices. This can be accomplished with minimal impact on drift by a universal trim, which sums a small voltage into the input.
DC Open Loop Gain Nonlinearity
It’s well understood that in order to maintain accuracy, a precision amplifier's DC open loop gain, AVOL, should be high. This can be seen by examining the equation for the closed loop gain:
Closed Loop Gain = AVCL = NG NG AVOL 1+
Noise gain (NG) is simply the gain seen by a small voltage source in series with the op amp input and is also the amplifier signal gain in the noninverting mode. If AVOL in the above equation is infinite, the closed loop gain is exactly equal to the noise gain. However, for finite values of AVOL, there is a closed loop gain error given by the equation:
% Gain Error = NG NG AVOL +
× 100% ˜ NG AVOL
× 100%, for NG << AVOL
Notice from the equation that the percent gain error is directly proportional to the noise gain, therefore the effects of finite AVOL are less for low gain. The first example in ill.6 where the noise gain is 1000 shows that for an open loop gain of 2 million, there is a gain error of about 0.05%. If the open loop gain stays constant over temperature and for various output loads and voltages, the gain error can be calibrated out of the measurement, and there is then no overall system gain error.
If, however, the open loop gain changes, the closed loop gain will also change, thereby introducing a gain uncertainty. In the second example in the figure, an AVOL decrease to 300,000 produces a gain error of 0.33%, introducing a gain uncertainty of 0.28% in the closed loop gain. In most applications, using the proper amplifier, the resistors around the circuit will be the largest source of gain error.
Changes in the output voltage level and the output loading are the most common causes of changes in the open loop gain of op amps. A change in open loop gain with signal level produces nonlinearity in the closed loop gain transfer function which cannot be removed during system calibration. Most op amps have fixed loads, so AVOL changes with load are not generally important. However, the sensitivity of AVOL to output signal level may increase for higher load currents.
The severity of the nonlinearity varies widely from device type to device type, and is generally not specified on the data sheet. The minimum AVOL is always specified, and choosing an op amp with a high AVOL will minimize the probability of gain nonlinearity errors. Gain nonlinearity can come from many sources, depending on the design of the op amp. One common source is thermal feedback. If temperature shift is the sole cause of the nonlinearity error, it can be assumed that minimizing the output loading will help. To verify this, the nonlinearity is measured with no load and then compared to the loaded condition.
An oscilloscope X-Y display test circuit for measuring DC open loop gain nonlinearity is shown in FIG. 2.7. The same precautions previously discussed relating to the offset voltage test circuit must be observed in this circuit. The amplifier is configured for a signal gain of -1. The open loop gain is defined as the change in output voltage divided by the change in the input offset voltage. However, for large values of AVOL, the offset may change only a few microvolts over the entire output voltage swing. Therefore the divider consisting of the 10 ohm resistor and RG (1 M-ohm) forces the voltage VY to be :
The value of RG is chosen to give measurable voltages at VY depending on the expected values of VOS.
The ±10 V ramp generator output is multiplied by the signal gain, -1, and forces the op amp output voltage VX to swing from +10 V to -10 V. Because of the gain factor applied to the offset voltage, the offset adjust potentiometer is added to allow the initial output offset to be set to zero. The resistor values chosen will null an input offset voltage of up to ±10 mV. Stable 10 V voltage references should be used at each end of the potentiometer to prevent output drift. Also, the frequency of the ramp generator must be quite low, probably no more than a fraction of 1 Hz because of the low corner frequency of the open loop gain (0.1 Hz for the OP177).
The plot on the right-hand side of FIG. 2.7 shows VY plotted against VX. If there is no gain nonlinearity the graph will have a constant slope, and AVOL is calculated as follows:
If there is nonlinearity, AVOL will vary as the output signal changes. The approximate open loop gain nonlinearity is calculated based on the maximum and minimum values of AVOL over the output voltage range:
Open Loop Gain Nonlinearity =
- Eq. 2.6
The closed loop gain nonlinearity is obtained by multiplying the open loop gain non linearity by the noise gain, NG:
Closed Loop Gain Nonlinearity ˜ NG •
In the ideal case, the plot of VOS versus VX would have a constant slope, and the reciprocal of the slope is the open loop gain, AVOL. A horizontal line with zero slope would indicate infinite open loop gain. In an actual op amp, the slope may change across the output range because of nonlinearity, thermal feedback, etc. In fact, the slope can even change sign.
FIG. 2.8 shows the VY (and VOS) versus VX plot for the OP177 precision op amp. The plot is shown for two different loads, 2 k-Ohm and 10 k-Ohm. The reciprocal of the slope is calculated based on the end points, and the average AVOL is about 8 million. The maximum and minimum values of AVOL across the output voltage range are measured to be approximately 9.1 million, and 5.7 million, respectively. This corresponds to an open loop gain nonlinearity of about 0.07ppm. Thus, for a noise gain of 100, the corresponding closed loop gain nonlinearity is about 7ppm.
Op Amp Noise
The three noise sources in an op amp circuit are the voltage noise of the op amp, the current noise of the op amp (there are two uncorrelated sources, one in each input), and the Johnson noise of the resistances in the circuit. Op amp noise has two components, "white" noise at medium frequencies and low frequency "1/f" noise, whose spectral density is inversely proportional to the square root of the frequency. It should be noted that, though both the voltage and the current noise may have the same char acteristic behavior, in a particular amplifier the 1/f corner frequency is not necessarily the same for voltage and current noise (it is usually specified for the voltage noise as shown in FIG. 2.9.
The low frequency noise is generally known as 1/f noise (the noise power obeys a 1/f law-the noise voltage or noise current is proportional to 1/vf). The frequency at which the 1/f noise spectral density equals the white noise is known as the 1/f corner frequency, FC, and is a figure of merit for an op amp, with low corner frequencies indicating better performance. Values of 1/f corner frequency vary from less than 1 Hz high accuracy bipolar op amps like the OP177/AD707, several hundred Hz for the AD743/745 FET-input op amps, to several thousands of Hz for some high speed op amps where process compromises favor high speed rather than low frequency noise.
For the OP177/AD707 shown in FIG. 2.9, the 1/f corner frequency is 0.7 Hz, and the white noise is 10 nV/kHz. The low frequency 1/f noise is often expressed as the peak-to-peak noise in the bandwidth 0.1 Hz to 10 Hz as shown in the scope photo in FIG. 2.9. Note that this noise ultimately limits the resolution of a precision mea surement system because the bandwidth up to 10 Hz is usually the bandwidth of most interest. The equation for the total rms noise, Vn,rms, in the bandwidth FL to FH is given by the equation:
...where vnw is the noise spectral density in the "white noise" region (usually specified at a frequency of 1 kHz), FC is the 1/f corner frequency, and FL and FH is the measurement bandwidth of interest. In the example shown, the 0.1 Hz to 10 Hz noise is calculated to be 36nV rms, or approximately 238 nV peak-to-peak, which closely agrees with the scope photo on the right (a factor of 6.6 is generally used to convert rms values to peak-to-peak values).
It should be noted that at higher frequencies, the term in the equation containing the natural logarithm becomes insignificant, and the expression for the rms noise be comes:
And, if FH >> FL,
V F v F n rms H nw H , ( )
However, some op amps (such as the OP07 and OP27) have voltage noise characteristics that increase slightly at high frequencies. The voltage noise versus frequency curve for op amps should therefore be examined carefully for flatness when calculating high frequency noise using this approximation.
At very low frequencies when operating exclusively in the 1/f region, FC >> (FH - FL), and the expression for the rms noise reduces to:
Note that there is no way of reducing this 1/f noise by filtering if operation extends to DC.
= 0.1 Hz and FL
= 0.001 still yields an rms 1/f noise of about 18 nV rms, or 119 nV peak-to-peak.
The point is that averaging the results of a large number of measurements taken over a long period of time has practically no effect on the error produced by 1/f noise. The only method of reducing it further is to use a chopper stabilized op amp which does not pass the low frequency noise components.
A generalized noise model for an op amp is shown in FIG. 2.10. All uncorrelated noise sources add as a root-sum-of-squares manner, i.e., noise voltages V1, V2, and V3 give a result of:
Thus, any noise voltage which is more than four or five times any of the others is dominant, and the others may generally be ignored. This simplifies noise analysis.
In this diagram, the total noise of all sources is shown referred to the input (RTI). The RTI noise is useful because it can be compared directly to the input signal level. The total noise referred to the output (RTO) is obtained by simply multiplying the RTI noise by the noise gain.
The diagram assumes that the feedback network is purely resistive. If it contains reac tive elements (usually capacitors), the noise gain is not constant over the bandwidth of interest, and more complex techniques must be used to calculate the total noise (see in particular, Reference 12). However, for precision applications where the feedback network is most likely to be resistive, the equations are valid.
Notice that the Johnson noise voltage associated with the three resistors has been included. All resistors have a Johnson noise of 4 kTBR, where k is Boltzmann's Constant (1.38 × 10-23 J/K), T is the absolute temperature, B is the bandwidth in Hz, and R is the resistance in ohms. A simple relationship which is easy to remember is that a 1000 ohm resistor generates a Johnson noise of 4nV_/Hz at 25ºC.
The voltage noise of various op amps may vary from under 1nV_/Hz to 20nV_/Hz, or even more. Bipolar input op amps tend to have lower voltage noise than JFET input ones, although it is possible to make JFET input op amps with low voltage noise (such as the AD743/AD745), at the cost of large input devices and hence large (~20pF) input capacitance. Current noise can vary much more widely, from around 0.1fA_/Hz (in JFET input electrometer op amps) to several pA_/Hz (in high speed bipolar op amps). For bipolar or JFET input devices where all the bias current flows into the input junction, the current noise is simply the Schottky (or shot) noise of the bias current. The shot noise spectral density is simply 2IBq amps_/Hz, where IB is the bias current (in amps) and q is the charge on an electron (1.6 × 10^-19 C). It cannot be calculated for bias-compensated or current feedback op amps where the external bias current is the difference between two internal current sources.
Current noise is only important when it flows through an impedance and in turn gen erates a noise voltage. The equation shown in FIG. 2.10 shows how the current noise flowing in the resistors contribute to the total noise. The choice of a low noise op amp therefore depends on the impedances around it. Consider an OP27, a bias compensated op amp with low voltage noise (3 nV_/Hz), but quite high current noise (1 pA_/Hz) as shown in the schematic of FIG. 2.11. With zero source impedance, the voltage noise dominates. With a source resistance of 3 k-ohm , the current noise (1 pA_/Hz) flowing in 3 k-ohm will equal the voltage noise, but the Johnson noise of the 3 k-ohm resistor is 7 nV_/Hz and so is dominant. With a source resistance of 300 k-ohm , the effect of the current noise increases a hundredfold to 300 nV_/Hz, while the voltage noise is unchanged, and the Johnson noise (which is proportional to the square root of the resistance) increases tenfold. Here, the current noise dominates.
The previous example shows that the choice of a low noise op amp depends on the source impedance of the input signal, and at high impedances, current noise always dominates. This is shown in FIG. 2.12 for several bipolar (OP07, OP27, 741) and JFET (AD645, AD743, AD744) op amps.
For low impedance circuitry (generally < 1 k-ohm ), amplifiers with low voltage noise, such as the OP27 will be the obvious choice, and their comparatively large current noise will not affect the application. At medium resistances, the Johnson noise of resistors is dominant, while at very high resistances, we must choose an op amp with the smallest possible current noise, such as the AD549 or AD645.
Until recently, BiFET amplifiers (with JFET inputs) tended to have comparatively high voltage noise (though very low current noise), and thus were more suitable for low noise applications in high rather than low impedance circuitry. The AD645, AD743, and AD745 have very low values of both voltage and current noise. The AD645 specifications at 10 kHz are 10nV_/Hz and 0.6fA_/Hz, and the AD743/ AD745 specifications at 10 kHz are 2.0 nV_/Hz and 6.9 fA_/Hz. These make possible the design of low noise amplifier circuits which have low noise over a wide range of source impedances.
Common Mode Rejection and Power Supply Rejection
If a signal is applied equally to both inputs of an op amp so that the differential input voltage is unaffected, the output should not be affected. In practice, changes in common mode voltage will produce changes in the output. The common mode rejection ratio or CMRR is the ratio of the common mode gain to the differential- mode gain of an op amp. For example, if a differential input change of Y volts will produce a change of 1 V at the output, and a common mode change of X volts produces a similar change of 1 V, then the CMRR is X/Y. It is normally expressed in dB, and typical LF values are between 70 and 120 dB. When expressed in dB, it is generally referred to as common mode rejection (CMR). At higher frequencies, CMR deteriorates- many op amp data sheets show a plot of CMR versus frequency as shown in FIG. 2.13 for the OP177/AD707 precision op amps.
CMRR produces a corresponding output offset voltage error in op amps configured in the non-inverting mode as shown in FIG. 2.14. Op amps configured in the inverting mode have no CMRR output error because both inputs are at ground or virtual ground, so there is no common mode voltage, only the offset voltage of the amplifier if un-nulled.
If the supply of an op amp changes, its output should not, but it will. The specification of power supply rejection ratio or PSRR is defined similarly to the definition of CMRR. If a change of X volts in the supply produces the same output change as a differential input change of Y volts, then the PSRR on that supply is X/Y. When the ratio is expressed in dB, it is generally referred to as power supply rejection, or PSR. The definition of PSRR assumes that both supplies are altered equally in opposite directions-otherwise the change will introduce a common mode change as well as a supply change, and the analysis becomes considerably more complex. It is this effect which causes apparent differences in PSRR between the positive and negative supplies. In the case of single supply op amps, PSR is generally defined with respect to the change in the positive supply. Many single supply op amps have separate PSR specifications for the positive and negative supplies. The PSR of the OP177/AD707 is shown in FIG. 2.15.
The PSRR of op amps is frequency dependent, therefore power sup plies must be well decoupled as shown in FIG. 2.16. At low frequencies, several devices may share a 10-50 µF capacitor on each supply, provided it is no more than 10cm (PC track distance) from any of them. At high frequencies, each IC must have every supply decoupled by a low inductance capacitor (0.1 µF or so) with short leads and PC tracks. These capacitors must also provide a return path for HF currents in the op amp load. Decoupling capacitors should be connected to a low impedance large area ground plane with minimum lead lengths. Surface mount capacitors minimize lead inductance and are a good choice.
Amplifier DC Error Budget Analysis
A room temperature error budget analysis for the OP177A op amp is shown in FIG. 2.17. The amplifier is connected in the inverting mode with a signal gain of 100. The key data sheet specifications are also shown in the diagram. We assume an input signal of 100 mV full scale which corresponds to an output signal of 10 V. The various error sources are normalized to full scale and expressed in parts per million (ppm).
Note: parts per million (ppm) error = fractional error × 10^6 = % error × 10^4.
Note that the offset errors due to VOS and IOS and the gain error due to finite AVOL can be removed with a system calibration. However, the error due to open loop gain non linearity cannot be removed with calibration and produces a relative accuracy error, often called resolution error.
The second contributor to resolution error is the 1/f noise. This noise is always present and adds to the uncertainty of the measurement. The overall relative accuracy of the circuit at room temperature is 9 ppm which is equivalent to approximately 17 bits of resolution.
Single Supply Op Amps
Over the last several years, single supply operation has become an increasingly important requirement because of market requirements. Auto motive, set-top box, camera/camcorder, PC, and laptop computer applications are demanding IC vendors to supply an array of linear devices that operate on a single supply rail, with the same performance of dual supply parts. Power consumption is now a key parameter for line or battery operated systems, and in some instances, more important than cost. This makes low-voltage/ low supply current operation critical; at the same time, however, accuracy and precision requirements have forced IC manufacturers to meet the challenge of "doing more with less" in their amplifier designs.
In a single-supply application, the most immediate effect on the performance of an amplifier is the reduced input and output signal range. As a result of these lower input and output signal excursions, amplifier circuits become more sensitive to internal and external error sources. Precision amplifier offset voltages on the order of 0.1 mV are less than a 0.04 LSB error source in a 12-bit, 10 V full-scale system. In a single-supply system, however, a "rail-to-rail" precision amplifier with an offset voltage of 1 mV represents a 0.8 LSB error in a 5 V full-scale system, and 1.6 LSB error in a 2.5 V full scale system.
To keep battery current drain low, larger resistors are usually used around the op amp.
Since the bias current flows through these larger resistors, they can generate offset errors equal to or greater than the amplifier's own offset voltage.
Gain accuracy in some low voltage single-supply devices is also reduced, so device selection needs careful consideration. Many amplifiers having open-loop gains in the millions typically operate on dual supplies: for example, the OP07 family types. However, many single-supply/rail-to-rail amplifiers for precision applications typically have open-loop gains between 25,000 and 30,000 under light loading (>10 k-ohm ). Selected devices, like the OP113/213/413 family, do have high open-loop gains (i.e., > 1M).
Many trade-offs are possible in the design of a single-supply amplifier circuit: speed versus power, noise versus power, precision versus speed and power, etc. Even if the noise floor remains constant (highly unlikely), the signal-to-noise ratio will drop as the signal amplitude decreases.
Besides these limitations, many other design considerations that are otherwise minor issues in dual-supply amplifiers now become important. For example, signal-to-noise (SNR) performance degrades as a result of reduced signal swing. "Ground reference" is no longer a simple choice, as one reference voltage may work for some devices, but not others. Amplifier voltage noise increases as operating supply current drops, and bandwidth decreases. Achieving adequate bandwidth and required precision with a somewhat limited selection of amplifiers presents significant system design challenges in single-supply, low-power applications.
Most circuit designers take "ground" reference for granted. Many analog circuits scale their input and output ranges about a ground reference. In dual-supply applications, a reference that splits the supplies (0 V) is very convenient, as there is equal supply headroom in each direction, and 0 V is generally the voltage on the low impedance ground plane.
In single-supply/rail-to-rail circuits, however, the ground reference can be chosen anywhere within the supply range of the circuit, since there is no standard to follow.
The choice of ground reference depends on the type of signals processed and the amplifier characteristics. For example, choosing the negative rail as the ground reference may optimize the dynamic range of an op amp whose output is designed to swing to 0 V. On the other hand, the signal may require level shifting in order to be compatible with the input of other devices (such as ADCs) that are not designed to operate at 0 V input.
Early single-supply "zero-in, zero-out" amplifiers were designed on bipolar processes which optimized the performance of the NPN transistors. The PNP transistors were either lateral or substrate PNPs with much less bandwidth than the NPNs. Fully complementary processes are now required for the new-breed of single-supply/rail-to rail operational amplifiers. These new amplifier designs do not use lateral or substrate PNP transistors within the signal path, but incorporate parallel NPN and PNP in put stages to accommodate input signal swings from ground to the positive supply rail. Furthermore, rail-to-rail output stages are designed with bipolar NPN and PNP common-emitter, or N-channel/P-channel common-source amplifiers whose collector-emitter saturation voltage or drain-source channel on-resistance determine output signal swing as a function of the load current.
The characteristics of a single-supply amplifier input stage (common mode rejection, input offset voltage and its temperature coefficient, and noise) are critical in precision, low-voltage applications. Rail-to-rail input operational amplifiers must resolve small signals, whether their inputs are at ground, or in some cases near the amplifier's positive supply. Amplifiers having a minimum of 60 dB common mode rejection over the entire input common mode voltage range from 0 V to the positive supply are good candidates. It is not necessary that amplifiers maintain common mode rejection for signals beyond the supply voltages: what is required is that they do not self-destruct for momentary overvoltage conditions. Furthermore, amplifiers that have offset volt ages less than 1 mV and offset voltage drifts less than 2 µV/°C are also very good candidates for precision applications. Since input signal dynamic range and SNR are equally if not more important than output dynamic range and SNR, precision single supply/rail-to-rail operational amplifiers should have noise levels referred-to-input (RTI) less than 5 µVp-p in the 0.1 Hz to 10 Hz band.
The need for rail-to-rail amplifier output stages is driven by the need to maintain wide dynamic range in low-supply voltage applications. A single-supply/rail-to-rail amplifier should have output voltage swings which are within at least 100 mV of either supply rail (under a nominal load). The output voltage swing is very dependent on output stage topology and load current. The voltage swing of a good output stage should maintain its rated swing for loads down to 10 k-ohm . The smaller the VOL and the larger the VOH, the better. System parameters, such as "zero-scale" or "full-scale" output voltage, should be determined by an amplifier's VOL (for zero-scale) and VOH (for full-scale).
Since the majority of single-supply data acquisition systems require at least 12- to 14 bit performance, amplifiers which exhibit an open-loop gain greater than 30,000 for all loading conditions are good choices in precision applications.
Single Supply Op Amp Input Stages
There is some demand for op amps whose input common mode voltage includes both supply rails. Such a feature is undoubtedly useful in some applications, but engineers should recognize that there are relatively few applications where it is absolutely essential. These should be carefully distinguished from the many applications where common mode range close to the supplies or one that includes one of the supplies is necessary, but input rail-to-rail operation is not.
In many single-supply applications, it is required that the input go to only one of the supply rails (usually ground). High-side or low-side sensing applications are good examples of this. Amplifiers which will handle zero-volt inputs are relatively easily
offset voltage for signals near the positive supply. It should be noted that true rail-to-rail input stages can also be constructed from CMOS transistors as in the case of the OP250/450 and the AD8531/8532/8534.
Amplifier input bias current, a function of transistor current gain, is also a function of the applied input common mode voltage. The result is relatively poor common mode rejection (CMR), and a changing common mode input impedance over the common mode input voltage range, compared to familiar dual-supply devices. These specifications should be considered carefully when choosing a rail-rail input op amp, especially for a non-inverting configuration. Input offset voltage, input bias current, and even CMR may be quite good over part of the common mode range, but much worse in the region where operation shifts between the NPN and PNP devices and vice versa.
True rail-to-rail amplifier input stage designs must transition from one differential pair to the other differential pair somewhere along the input common mode voltage range. Some devices like the OP191/291/491 family and the OP279 have a common mode crossover threshold at approximately 1 V below the positive supply. The PNP differential input stage is active from about 200 mV below the negative supply to within about 1 V of the positive supply. Over this common mode range, amplifier in put offset voltage, input bias current, CMR, input noise voltage/current are primarily determined by the characteristics of the PNP differential pair. At the crossover thresh old, however, amplifier input offset voltage becomes the average offset voltage of the NPN/PNP pairs and can change rapidly. Also, amplifier bias currents, dominated by the PNP differential pair over most of the input common mode range, change polarity and magnitude at the crossover threshold when the NPN differential pair becomes active.
Op amps like the OP184/284/484 utilize a rail-to-rail input stage design where both NPN and PNP transistor pairs are active throughout the entire input common mode voltage range, and there is no common mode crossover threshold. Amplifier input offset voltage is the average offset voltage of the NPN and the PNP stages. Amplifier input offset voltage exhibits a smooth transition throughout the entire input common mode range because of careful laser trimming of the resistors in the input stage. In the same manner, through careful input stage current balancing and input transistor design, amplifier input bias currents also exhibit a smooth transition throughout the entire common mode input voltage range. The exception occurs at the extremes of the input common mode range, where amplifier offset voltages and bias currents increase sharply due to the slight forward-biasing of parasitic p-n junctions. This occurs for input voltages within approximately 1 V of either supply rail.
When both differential pairs are active throughout the entire input common mode range, amplifier transient response is faster through the middle of the common mode range by as much as a factor of 2 for bipolar input stages and by a factor of v2 for JFET input stages. Input stage transconductance determines the slew rate and the unity-gain crossover frequency of the amplifier, hence response time degrades slightly at the extremes of the input common mode range when either the PNP stage (signals approaching the positive supply rail) or the NPN stage (signals approaching the negative supply rail) are forced into cutoff. The thresholds at which the transconductance changes occur are approximately within 1 V of either supply rail, and the behavior is similar to that of the input bias currents.
Applications which require true rail-rail inputs should therefore be carefully evaluated, and the amplifier chosen to ensure that its input offset voltage, input bias current, common mode rejection, and noise (voltage and current) are suitable.
Single Supply Op Amp Output Stages
The earliest IC op amp output stages were NPN emitter followers with NPN current sources or resistive pull-downs, as shown in the left-hand diagram of FIG. 2.21.
Naturally, the slew rates were greater for positive-going than for negative-going signals. While all modern op amps have push-pull output stages of some sort, many are still asymmetrical, and have a greater slew rate in one direction than the other. Asymmetry tends to introduce distortion on AC signals and generally results from the use of IC processes with faster NPN than PNP transistors. It may also result in the ability of the output to approach one supply more closely than the other.
In many applications, the output is required to swing only to one rail, usually the negative rail (i.e., ground in single-supply systems). A pull-down resistor to the negative rail will allow the output to approach that rail (provided the load impedance is high enough, or is also grounded to that rail), but only slowly. Using an FET current source instead of a resistor can speed things up, but this adds complexity.
With new complementary bipolar processes (CB), well matched high speed PNP and NPN transistors are available. The complementary emitter follower output stage shown in the right-hand diagram of FIG. 2.21 has many advantages including low output impedance. However, the output can only swing within about one VBE drop of either supply rail. An output swing of +1 V to +4 V is typical of such stages when operated on a single +5 V supply.
The complementary common-emitter/common-source output stages shown in FIG. 2.22 allow the output voltage to swing much closer to the output rails, but these stages have higher open loop output impedance than the emitter follower-based stages. In practice, however, the amplifier's open loop gain and local feedback produce an apparent low output impedance, particularly at frequencies below 10 Hz.
The complementary common emitter output stage using BJTs (left-hand diagram in FIG. 2.22) cannot swing completely to the rails, but only to within the transistor saturation voltage (VCESAT) of the rails. For small amounts of load current (less than 100 µA), the saturation voltage may be as low as 5 to 10 mV, but for higher load cur rents, the saturation voltage can increase to several hundred mV (for example, 500 mV at 50 mA).
On the other hand, an output stage constructed of CMOS FETs can provide nearly true rail-to-rail performance, but only under no-load conditions. If the output must source or sink current, the output swing is reduced by the voltage dropped across the FETs internal "on" resistance (typically, 100 ohm for precision amplifiers, but can be less than 10 ohm for high current drive CMOS amplifiers).
For these reasons, it is apparent that there is no such thing as a true rail-to-rail output stage, hence the title of FIG. 2.22 ("almost" rail-to-rail output stages).
FIG. 2.23 summarizes the performance characteristics of a number of single- sup ply op amps suitable for some precision applications. The devices are listed in order of increasing supply current. Single, dual, and quad versions of each op amp are available, so the supply current is the normalized ISY/amplifier for comparison. The in put and output voltage ranges (VS = +5 V) are also supplied in the table. The "0, 4 V" inputs are PNP pairs, with the exception of the AD820/822/824 which use N- Channel JFETs. Output stages having voltage ranges designated "5 mV, 4 V" are NPN emitter-followers with current source pull-downs (OP193/293/493, OP113/213/413). Output stages designated "R/R" use CMOS common source stages (OP181/281/481) or CB common emitter stages (OP196/296/496, OP191/291/491, AD820/822/824, OP184/284/484).
In summary, the following points should be considered when selecting amplifiers for single-supply/rail-to-rail applications:
First, input offset voltage and input bias currents are a function of the applied input common mode voltage (for true rail-to-rail input op amps). Circuits using this class of amplifiers should be designed to minimize resulting errors. An inverting amplifier configuration with a false ground reference at the non-inverting input prevents these errors by holding the input common mode voltage constant. If the inverting amplifier configuration cannot be used, then amplifiers like the OP184/284/OP484 which do not exhibit any common mode crossover thresholds should be used.
Second, since input bias currents are not always small and can exhibit different polarities, source impedance levels should be carefully matched to minimize additional input bias current-induced offset voltages and increased distortion. Again, consider using amplifiers that exhibit a smooth input bias current transition throughout the applied input common mode voltage.
Third, rail-to-rail amplifier output stages exhibit load-dependent gain which affects amplifier open-loop gain, and hence closed-loop gain accuracy. Amplifiers with open-loop gains greater than 30,000 for resistive loads less than 10 k-ohm are good choices in precision applications. For applications not requiring full rail-rail swings, device families like the OP113/213/413 and OP193/293/493 offer DC gains of 200,000 or more.
Lastly, no matter what claims are made, rail-to-rail output voltage swings are functions of the amplifier's output stage devices and load current. The saturation voltage (VCESAT), saturation resistance (RSAT) for bipolar output stages, and FET on-resistance for CMOS output stages, as well as load current all affect the amplifier output voltage swing.
Op Amp Process Technologies
The wide variety of processes used to make op amps are shown in FIG. 2.24. The earliest op amps were made using standard NPN-based bipolar processes. The PNP transistors available on these processes were extremely slow and were used primarily for current sources and level shifting.
The ability to produce matching high speed PNP transistors on a bipolar process added great flexibility to op amp circuit designs. These complementary bipolar (CB) processes are widely used in today's precision op amps, as well as those requiring wide bandwidths. The high speed PNP transistors have fts which are greater than one half the ft s of the NPNs.
The addition of JFETs to the complementary bipolar process (CBFET) allow high input impedance op amps to be designed suitable for such applications as photodiode or electrometer preamplifiers.
CMOS op amps, with a few exceptions, generally have relatively poor offset voltage, drift, and voltage noise. However, the input bias current is very low. They offer low power and cost, however, and improved performance can be achieved with BiFET or CBFET processes.
The addition of bipolar or complementary devices to a CMOS process (BiMOS or CBCMOS) adds great flexibility, better linearity, and low power. The bipolar devices are typically used for the input stage to provide good gain and linearity, and CMOS devices for the rail-to-rail output stage.
In summary, there is no single IC process which is optimum for all op amps. Process selection and the resulting op amp design depends on the targeted applications and ultimately should be transparent to the customer.
Instrumentation Amplifiers (In-Amps)
An instrumentation amplifier is a closed-loop gain block which has a differential input and an output which is single-ended with respect to a reference terminal (see FIG. 2.25). The input impedances are balanced and have high values, typically 10^9 ohm or higher. Unlike an op amp, which has its closed-loop gain determined by external resistors connected between its inverting input and its output, an in-amp employs an internal feedback resistor network which is isolated from its signal input terminals.
With the input signal applied across the two differential inputs, gain is either preset internally or is user-set by an internal (via pins) or external gain resistor, which is also isolated from the signal inputs. Typical in-amp gain settings range from 1 to 10,000.
In order to be effective, an in-amp needs to be able to amplify microvolt-level signals, while simultaneously rejecting volts of common mode signal at its inputs. This requires that in-amps have very high common mode rejection (CMR): typical values of CMR are 70 dB to over 100 dB, with CMR usually improving at higher gains.
It is important to note that a CMR specification for DC inputs alone is not sufficient in most practical applications. In industrial applications, the most common cause of external interference is pickup from the 50/60 Hz AC power mains. Harmonics of the power mains frequency can also be troublesome. In differential measurements, this type of interference tends to be induced equally onto both in-amp inputs. The interfering signal therefore appears as a common mode signal to the in-amp. Specifying CMR over frequency is more important than specifying its DC value.
Imbalance in the source impedance can degrade the CMR of some in-amps.
Analog Devices fully specifies in-amp CMR at 50/60 Hz with a source impedance imbalance of 1 k-ohm.
Low-frequency CMR of op amps, connected as subtractors as shown in FIG. 2.26, generally is a function of the resistors around the circuit, not the op amp. A mismatch of only 0.1% in the resistor ratios will reduce the DC CMR to approximately 66dB. Another problem with the simple op amp subtractor is that the input impedances are relatively low and are unbalanced between the two sides. The input impedance seen by V1 is R1, but the input impedance seen by V2 is R1' + R2'. This configuration can be quite problematic in terms of CMR, since even a small source impedance imbalance (~10 ohm) will degrade the workable CMR.
Instrumentation Amplifier Configurations
Instrumentation amplifier configurations are based on op amps, but the simple subtractor circuit described above lacks the performance required for precision applications. An in-amp architecture which overcomes some of the weaknesses of the subtractor circuit uses two op amps as shown in FIG. 2.27. This circuit is typi cally referred to as the two op amp in-amp. Dual IC op amps are used in most cases for good matching. The circuit gain may be trimmed with an external resistor, RG. The input impedance is high, permitting the impedance of the signal sources to be high and unbalanced. The DC common mode rejection is limited by the matching of R1/R2 to R1'/R2'. If there is a mismatch in any of the four resistors, the DC common mode rejection is limited to:
There is an implicit advantage to this configuration due to the gain executed on the signal. This raises the CMR in proportion.
Integrated instrumentation amplifiers are particularly well suited to meeting the combined needs of ratio matching and temperature tracking of the gain-setting resis tors. While thin film resistors fabricated on silicon have an initial tolerance of up to ±20%, laser trimming during production allows the ratio error between the resistors to be reduced to 0.01% (100 ppm). Furthermore, the tracking between the temperature coefficients of the thin film resistors is inherently low and is typically less than 3 ppm/ºC (0.0003%/ºC).
FIG. 2.27: Two op amp instrumentation amplifier.
When dual supplies are used, VREF is normally connected directly to ground. In single supply applications, VREF is usually connected to a low impedance voltage source equal to one-half the supply voltage. The gain from VREF to node "A" is R1/R2, and the gain from node "A" to the output is R2'/R1'. This makes the gain from VREF to the output equal to unity, assuming perfect ratio matching. Note that it is critical that the source impedance seen by VREF be low, otherwise CMR will be degraded.
One major disadvantage of this design is that common mode voltage input range must be traded off against gain. The amplifier A1 must amplify the signal at V1 by:
If R1 >> R2 (low gain in FIG. 2.27), A1 will saturate if the common mode signal is too high, leaving no headroom to amplify the wanted differential signal. For high gains (R1<< R2), there is correspondingly more headroom at node "A" allowing larger common mode input voltages.
The AC common mode rejection of this configuration is generally poor because the signal from V1 to VOUT has the additional phase shift of A1. In addition, the two amplifiers are operating at different closed-loop gains (and thus at different bandwidths). The use of a small trim capacitor "C" as shown in the diagram can improve the AC CMR somewhat.
A low gain (G = 2) single supply two op amp in-amp configuration results when RG is not used, and is shown in FIG. 2.28. The input common mode and differential signals must be limited to values which prevent saturation of either A1 or A2. In the example, the op amps remain linear to within 0.1 V of the supply rails, and their upper and lower output limits are designated VOH and VOL, respectively. Using the equations shown in the diagram, the voltage at V1 must fall between 1.3 V and 2.4 V to prevent A1 from saturating. Notice that VREF is connected to the average of VOH and VOL (2.5 V). This allows for bipolar differential input signals with VOUT referenced to +2.5 V.
A high gain (G = 100) single supply two op amp in-amp configuration is shown in FIG. 2.29. Using the same equations, note that the voltage at V1 can now swing between 0.124 V and 4.876 V. Again, VREF is connected to 2.5 V to allow for bipolar differential input and output signals.
The above discussion shows that regardless of gain, the basic two op amp in-amp does not allow for zero-volt common mode input voltages when operated on a single supply. This limitation can be overcome using the circuit shown in FIG. 2.30 which is implemented in the AD627 in-amp. Each op amp is com posed of a PNP common emitter input stage and a gain stage, designated Q1/A1 and Q2/A2, respectively. The PNP transistors not only provide gain but also level shift the input signal positive by about 0.5 V, thereby allowing the common mode input voltage to go to 0.1 V below the negative supply rail. The maximum positive input voltage allowed is 1 V less than the positive supply rail.
The AD627 in-amp delivers rail-to-rail output swing and operates over a wide supply voltage range (+2.7 V to ±18 V). Without RG, the external gain setting resistor, the in-amp gain is 5. Gains up to 1000 can be set with a single external resistor. Common mode rejection of the AD627B at 60 Hz with a 1 k-ohm source imbalance is 85dB when operating on a single +3 V supply and G = 5. Even though the AD627 is a two op amp in-amp, a patented circuit keeps the CMR flat out to a much higher frequency than would be achievable with a conventional discrete two op amp in-amp. The AD627 data sheet (analog.com) has a detailed discussion of allowable input/output voltage ranges as a function of gain and power supply volt ages. Key specifications for the AD627 are summarized in FIG. 2.31.
For true balanced high impedance inputs, three op amps may be connected to form the in-amp shown in FIG. 2.32. This circuit is typically referred to as the three op amp in-amp. The gain of the amplifier is set by the resistor, RG, which may be internal, external, or (software or pin-strap) programmable. In this configuration, CMR depends upon the ratio matching of R3/R2 to R3'/R2'. Furthermore, common mode signals are only amplified by a factor of 1 regardless of gain (no common mode voltage will appear across RG, hence, no common mode cur rent will flow in it because the input terminals of an op amp will have no significant potential difference between them). Thus, CMR will theoretically increase in direct proportion to gain. Large common mode signals (within the A1-A2 op amp headroom limits) may be handled at all gains. Finally, because of the symmetry of this configuration, common mode errors in the input amplifiers, if they track, tend to be canceled out by the subtractor output stage. These features explain the popularity of the three op amp in-amp configuration.
The classic three op amp configuration has been used in a number of monolithic IC instru mentation amplifiers. Besides offering excellent matching be tween the three internal op amps, thin film laser trimmed resistors provide excellent ratio match ing and gain accuracy at much lower cost than using discrete op amps and resistor networks. The AD620 is an excellent example of monolithic in-amp technol ogy, and a simplified schematic is shown in FIG. 2.33.
The AD620 is a highly popular in-amp and is specified for power supply voltages from ±2.3 V to ±18 V. Input voltage noise is only 9 nV_/Hz @ 1 kHz. Maximum input bias current is only 1 nA maximum because of the Superbeta input stage.
Overvoltage protection is provided by the internal 400 ohm thin-film current-limit resistors in conjunction with the diodes which are connected from the emitter-to- base of Q1 and Q2. The gain is set with a single external RG resistor. The appropriate internal resistors are trimmed so that standard 1% or 0.1% resistors can be used to set the AD620 gain to popular gain values.
As in the case of the two op amp in-amp configuration, single sup ply operation of the three op amp in-amp requires an understand ing of the internal node voltages.
FIG. 2.34 shows a generalized diagram of the in-amp operat ing on a single +5 V supply.
The maximum and minimum allowable output voltages of the individual op amps are designated VOH (maximum high output) and VOL (minimum low output) respectively. Note that the gain from the common mode voltage to the outputs of A1 and A2 is unity, and that the sum of the common mode voltage and the signal voltage at these outputs must fall within the amplifier output voltage range. It is obvious that this configuration cannot handle input common mode voltages of either zero volts or +5 V because of saturation of A1 and A2. As in the case of the two op amp in-amp, the output reference is positioned halfway between VOH and VOL in order to allow for bipolar differential input signals.
This chapter has emphasized the operation of high performance linear circuits from a single, low-voltage supply (5 V or less) is a common requirement. While there are many precision single supply operational amplifiers, such as the OP213, the OP291, and the OP284, and some good single-supply instrumentation amplifiers, the highest performance instrumentation amplifiers are still specified for dual-supply operation.
One way to achieve both high precision and single-supply operation takes advantage of the fact that several popular sensors (e.g., strain gages) provide an output signal centered around the (approximate) mid-point of the supply voltage (or the reference voltage), where the inputs of the signal conditioning amplifier need not operate near "ground" or the positive supply voltage.
Under these conditions, a dual-supply instrumentation amplifier referenced to the supply mid-point followed by a "rail-to-rail" operational amplifier gain stage provides very high DC precision. FIG. 2.35 illustrates one such high-performance instrumentation amplifier operating on a single, +5 V supply. This circuit uses an AD620 low-cost precision instrumentation amplifier for the input stage, and an AD822 JFET input dual rail-to-rail output operational amplifier for the output stage.
In this circuit, R3 and R4 form a voltage divider which splits the supply voltage in half to +2.5 V, with fine adjustment provided by a trimming potentiometer, P1. This voltage is applied to the input of A1, an AD822 which buffers it and provides a low-im pedance source needed to drive the AD620's reference pin. The AD620's Reference pin has a 10 k-ohm input resistance and an input sig nal current of up to 200µA. The other half of the AD822 is connected as a gain-of-3 inverter, so that it can output ±2.5 V, "rail-to-rail," with only ±0.83 V required of the AD620. This output voltage level of the AD620 is well within the AD620's capability, thus ensuring high linearity for the "dual-supply" front end. Note that the final output voltage must be measured with respect to the +2.5 V reference, and not to GND.
The general gain expression for this composite instrumentation amplifier is the prod uct of the AD620 and the inverting amplifier gains:
For this example, an overall gain of 10 is realized with RG = 21.5 k-ohm (closest standard value). The table (FIG. 2.36) summarizes various RG/gain values and performance.
In this application, the allowable input voltage on either input to the AD620 must lie between +2 V and +3.5 V in order to maintain linearity. For example, at an over all circuit gain of 10, the common mode input voltage range spans 2.25 V to 3.25 V, allowing room for the ±0.25 V full-scale differential input voltage required to drive the output ±2.5 V about VREF.
The inverting configuration was chosen for the output buffer to facilitate system output offset voltage adjustment by summing currents into the A2 stage buffer's feedback summing node. These offset currents can be provided by an external DAC, or from a resistor connected to a reference voltage.
The AD822 rail-to-rail output stage exhibits a very clean transient response (not shown) and a small-signal bandwidth over 100 kHz for gain configurations up to 300. Note that excellent linearity is maintained over 0.1 V to 4.9 V VOUT. To reduce the effects of unwanted noise pickup, a capacitor is recommended across A2's feedback resistance to limit the circuit bandwidth to the frequencies of interest.
In cases where zero-volt inputs are required, the AD623 single supply in-amp configuration shown in FIG. 2.37 offers an attractive solution. The PNP emitter follower level shifters, Q1/Q2, allow the input signal to go 150 mV below the negative supply [...] reflected to output at high gains. For instance, a 0.5 mV input offset voltage becomes 5 V at the output for a gain of 10,000. For high gains, the best practice is to use an instrumentation amplifier as a preamplifier then use a post amplifier for further amplification.
In a pin-programmable gain in-amp such as the AD621, the gain setting resistors are internal, well matched, and the gain accuracy and gain drift specifications include their effects. The AD621 is otherwise generally similar to the externally gain-programmed AD620.
The gain error specification is the maximum deviation from the gain equation. Monolithic in-amps such as the AD624C have very low factory trimmed gain errors, with its maximum error of 0.02% at G = 1 and 0.25% at G = 500 being typical for this high quality in-amp. Notice that the gain error increases with increasing gain. Although externally connected gain networks allow the user to set the gain exactly, the temperature coefficients of the external resistors and the temperature differences between individual resistors within the network all contribute to the overall gain error. If the data is eventually digitized and presented to a digital processor, it may be possible to correct for gain errors by measuring a known reference voltage and then multiplying by a constant.
Nonlinearity is defined as the maximum deviation from a straight line on the plot of output versus input. The straight line is drawn between the end-points of the actual transfer function. Gain nonlinearity in a high quality in-amp is usually 0.01% (100 ppm) or less, and is relatively insensitive to gain over the recommended gain range.
The total input offset voltage of an in-amp consists of two components (see FIG. 2.39). Input offset voltage, VOSI , is that component of input offset which is reflected to the output of the in-amp by the gain G. Output offset voltage, VOSO, is independent of gain. At low gains, output offset voltage is dominant, while at high gains input offset dominates. The output offset voltage drift is normally specified as drift at G = 1 (where input ef fects are insignificant), while input offset voltage drift is given by a drift specification at a high gain (where output offset effects are negligible). The total output offset error, referred to the input (RTI), is equal to VOSI + VOSO/G. In-amp data sheets may specify VOSI and VOSO separately or give the total RTI input offset voltage for different values of gain.
Input bias currents may also produce offset errors in in-amp circuits (see FIG. 2.39). If the source resistance, RS, is unbalanced by an amount, firS, (often the case in bridge circuits), then there is an additional input offset voltage error due to the bias current, equal to IBfirS (assuming that IB+ ˜ IB- = IB). This error is reflected to the output, scaled by the gain G. The input offset current, IOS, creates an input offset volt age error across the source resistance, RS + firS, equal to IOS(RS + firS), which is also reflected to the output by the gain, G.
In-amp common mode error is a function of both gain and frequency. Analog Devices specifies in-amp CMR for a 1 k-ohm source impedance unbalance at a frequency of 60 Hz. The RTI common mode error is obtained by dividing the common mode voltage, VCM, by the common mode rejection ratio, CMRR.
Power supply rejection (PSR) is also a function of gain and frequency. For in-amps, it is customary to specify the sensitivity to each power supply separately.
Now that all DC error sources have been accounted for, a worst case DC error budget can be calculated by reflecting all the sources to the in-amp input (FIG. 2.40).
Instrumentation Amplifier Noise Sources
Since in-amps are primarily used to amplify small precision signals, it is important to understand the effects of all the associated noise sources. The in-amp noise model is shown in FIG. 2.41. There are two sources of input voltage noise. The first is represented as a noise source, VNI , in series with the input, as in a conventional op amp circuit. This noise is reflected to the output by the in-amp gain, G. The second noise source is the output noise, VNO, represented as a noise voltage in series with the in-amp output. The output noise, shown here referred to VOUT, can be referred to the input by dividing by the gain, G.
There are two noise sources associated with the input noise currents IN+ and IN-. Even though IN+ and IN- are usually equal (IN+ ˜ IN- = IN), they are uncorrelated, and therefore, the noise they each create must be summed in a root- sum-squares (RSS) fashion. IN+ flows through one half of RS, and IN- the other half. This generates two noise voltages, each having an amplitude, INRS/2. Each of these two noise sources is reflected to the output by the in-amp gain, G.
The total output noise is calculated by combining all four noise sources in an RSS manner:
In-amp data sheets often present the total voltage noise RTI as a function of gain. This noise spectral density includes both the input (VNI ) and output (VNO) noise contributions. The input current noise spectral density is specified separately. As in the case of op amps, the total noise RTI must be integrated over the in-amp closed- loop bandwidth to compute the RMS value. The bandwidth may be determined from data sheet curves which show frequency response as a function of gain.
In-Amp Bridge Amplifier Error Budget Analysis
It is important to understand in-amp error sources in a typical application. FIG. 2.42 shows a 350 ohm load cell which has a full scale output of 100 mV when excited with a 10 V source. The AD620 is configured for a gain of 100 using the external 499 ohm gain-setting resistor. The table shows how each error source contributes to the total unadjusted error of 2145ppm. The gain, off set, and CMR errors can be removed with a system calibration. The remaining errors--gain nonlinearity and 0.1 Hz to 10 Hz noise- -cannot be removed with calibration and limit the system resolution to 42.8 ppm (approximately 14-bit accuracy).
In-Amp Performance Tables
FIG. 2.43 shows a selection of precision in-amps designed primarily for operation on dual supplies. It should be noted that the AD620 is capable of single +5 V supply operation (see FIG. 2.35), but neither its input nor its output are capable of rail-to- rail swings.
Instrumentation amplifiers specifically designed for single supply operation are shown in FIG. 2.44. It should be noted that although the specifications in the figure are given for a single +5 V supply, all of the amplifiers are also capable of dual supply operation and are specified for both dual and single supply operation on their data sheets. In addition, the AD623 and AD627 will operate on a single +3 V supply.
The AD626 is not a true in-amp but is a differential amplifier with a thin-film input attenuator which allows the common mode voltage to exceed the supply voltages. This device is designed primarily for high and low-side current-sensing applications. It will also operate on a single +3 V supply.
In-Amp Input Overvoltage Protection
As interface amplifiers for data acquisition systems, instrumentation amplifiers are often subjected to input overloads, i.e., voltage levels in excess of the full scale for the selected gain range. The manufacturer's "absolute maximum" input ratings for the device should be closely observed. As with op amps, many in-amps have absolute maximum input voltage specifications equal to ±VS. External series resistors (for current limiting) and Schottky diode clamps may be used to prevent overload, if necessary.
Some instrumentation amplifiers have built-in overload protection circuits in the form of series resistors (thin film) or series protection FETs. In-amps such as the AMP-02 and the AD524 utilize series-protection FETs, because they act as a low impedance during normal operation, and a high impedance during fault conditions.
An additional Transient Voltage Suppresser (TVS) may be required across the input pins to limit the maximum differential input voltage. This is especially applicable to three op amp in-amps operating at high gain with low values of RG.
Chopper Stabilized Amplifiers
For the lowest offset and drift performance, chopper-stabilized amplifiers may be the only solution. The best bipolar amplifiers offer offset voltages of 10 µV and 0.1 µV/ºC drift. Offset voltages less than 5 µV with practically no measurable offset drift are obtainable with choppers, albeit with some penalties.
The basic chopper amplifier circuit is shown in FIG. 2.46.
When the switches are in the "Z" (auto-zero) position, capacitors C2 and C3 are charged to the amplifier input and output offset voltage, respectively.
When the switches are in the "S" (sample) position, VIN is connected to VOUT through the path comprised of R1, R2, C2, the amplifier, C3, and R3. The chopping frequency is usually between a few hundred Hz and several kHz, and it should be noted that because this is a sampling system, the input frequency must be much less than one-half the chopping frequency in order to prevent errors due to aliasing. The R1/C1 combination serves as an antialiasing filter.
It is also assumed that after a steady state condition is reached, there is only a mini mal amount of charge transferred during the switching cycles. The output capacitor, C4, and the load, RL, must be chosen such that there is minimal VOUT droop during the auto-zero cycle.
The basic chopper amplifier of FIG. 2.46 can pass only very low frequencies because of the input filtering required to prevent aliasing. The chopper-stabilized architecture shown in FIG. 2.47 is most often used in chopper amplifier imple mentations. In this circuit, A1 is the main amplifier, and A2 is the nulling amplifier.
In the sample mode (switches in "S" position), the nulling amplifier, A2, monitors the input offset voltage of A1 and drives its output to zero by applying a suitable correcting voltage at A1's null pin. Note, however, that A2 also has an input offset voltage, so it must correct its own error before attempting to null A1's offset.
This is achieved in the auto-zero mode (switches in "Z" position) by momentarily disconnecting A2 from A1, shorting its inputs together, and coupling its output to its own null pin. During the auto-zero mode, the correction voltage for A1 is momentarily held by C1. Similarly, C2 holds the correction voltage for A2 during the sample mode. In modern IC chop per-stabilized op amps, the storage capacitors C1 and C2 are on-chip.
Note in this architecture that the input signal is always connected to the output through A1. The bandwidth of A1 thus determines the overall signal bandwidth, and the input signal is not limited to less than one-half the chopping frequency as in the case of the traditional chopper amplifier architecture. However, the switching action does produce small transients at the chopping frequency which can mix with the input signal frequency and produce in-band distortion.
It is interesting to consider the effects of a chopper amplifier on low frequency 1/f noise. If the chopping frequency is considerably higher than the 1/f corner frequency of the input noise, the chopper-stabilized amplifier continuously nulls out the 1/f noise on a sample-by-sample basis. Theoretically, a chopper op amp therefore has no 1/f noise. However, the chopping action produces wideband noise which is generally much worse than that of a precision bipolar op amp.
FIG. 2.48 shows the noise of a precision bipolar amplifier (OP177/AD707) versus that of the AD8551/52/54 chopper-stabilized op amp. The peak-to-peak noise in various bandwidths is calculated for each in the table below the graphs. Note that as the fre quency is lowered, the chopper amplifier noise continues to drop, while the bipolar amplifier noise approaches a limit determined by the 1/f corner fre quency and its white noise (see FIG. 2.9). At a very low frequency, the noise performance of the chopper is superior to that of the bipolar op amp.
The AD8551/8552/8554 family of chop per-stabilized op amps offers rail-to-rail input and output single supply opera tion, low offset voltage, and low offset drift. The storage capacitors are internal to the IC, and no external capacitors other than standard decoupling capaci tors are required. Key specifications for the devices are given in FIG. 2.49.
It should be noted that extreme care must be taken when applying these devices to avoid parasitic thermocouple effects in order to fully realize the offset and drift per formance.
There are many applications where it is desirable, or even essential, for a sensor to have no direct ("galvanic") electrical connection with the system to which it is sup plying data, either in order to avoid the possibility of dangerous voltages or currents from one half of the system doing damage in the other, or to break an intractable ground loop. Such a system is said to be "isolated," and the arrangement which passes a signal without galvanic connections is known as an "isolation barrier." The protection of an isolation barrier works in both directions, and may be needed in either, or even in both.
The obvious application is where a sensor may accidentally encoun ter high voltages, and the system it is driving must be protected. Or a sensor may need to be isolated from accidental high voltages aris ing downstream, in order to protect its environment: examples include the need to prevent the ignition of explosive gases by sparks at sensors and the protection from electric shock of patients whose ECG, EEG or EMG is being monitored. The ECG case is interesting, as protection may be required in both directions: the patient must be protected from accidental electric shock, but if the patient's heart should stop, the ECG machine must be protected from the very high voltages (>7.5 kV) applied to the patient by the defibrillator which will be used to attempt to restart it.
Just as interference, or unwanted information, may be coupled by electric or magnetic fields, or by electromagnetic radiation, these phenomena may be used for the transmission of wanted information in the design of isolated systems. The most common isolation amplifiers use transformers, which exploit magnetic fields, and another com mon type uses small high voltage capacitors, exploiting electric fields. Opto-isolators, which consist of an LED and a photocell, provide isolation by using light, a form of electromagnetic radiation. Different isolators have differing performance: some are sufficiently linear to pass high accuracy analog signals across an isolation barrier, with others the signal may need to be converted to digital form before transmission, if accuracy is to be maintained, a common application for V/F converters.
Transformers are capable of analog accuracy of 12-16 bits and bandwidths up to several hundred kHz, but their maximum voltage rating rarely exceeds 10 kV, and is often much lower. Capacitively coupled isolation amplifiers have lower accuracy, perhaps 12-bits maximum, lower bandwidth, and lower voltage ratings-but they are cheap. Optical isolators are fast and cheap, and can be made with very high volt age ratings (4-7 kV is one of the more common ratings), but they have poor analog domain linearity, and are not usually suitable for direct coupling of precision analog signals.
Linearity and isolation voltage are not the only issues to be considered in the choice of isolation systems. Power is essential. Both the input and the output circuitry must be powered, and unless there is a battery on the isolated side of the isolation bar rier (which is possible, but rarely convenient), some form of isolated power must be provided. Systems using transformer isolation can easily use a transformer (either the signal transformer or another one) to provide isolated power, but it is impractical to transmit useful amounts of power by capacitive or optical means. Systems using these forms of isolation must make other arrangements to obtain isolated power supplies--this is a powerful consideration in favor of choosing transformer isolated isolation amplifiers: they almost invariably include an isolated power supply.
The isolation amplifier has an input circuit that is galvanically isolated from the power supply and the output circuit. In addition, there is minimal capacitance between the input and the rest of the device. Therefore, there is no possibility for DC current flow, and minimum AC coupling. Isolation amplifiers are intended for applications requir ing safe, accurate measurement of low frequency voltage or current (up to about 100 kHz) in the presence of high common-mode voltage (to thousands of volts) with high common mode rejection. They are also useful for line-receiving of signals transmitted at high impedance in noisy environments, and for safety in general-purpose measure ments, where DC and line-frequency leakage must be maintained at levels well below certain mandated minimums. Principal applications are in electrical environments of the kind associated with medical equipment, conventional and nuclear power plants, automatic test equipment, and industrial process control systems.
In the basic two-port form, the output and power circuits are not isolated from one another. In the three-port isolator shown in FIG. 2.51, the input circuits, output circuits, and power source are all isolated from one another. The figure shows the circuit architecture of a self-contained isolator, the AD210. An isolator of this type requires power from a two-terminal DC power supply. An internal oscillator (50 kHz) converts the DC power to AC, which is transformer-coupled to the shielded input sec tion, then converted to DC for the input stage and the auxiliary power output. The AC carrier is also modulated by the amplifier output, transformer-coupled to the output stage, demodulated by a phase-sensitive demodulator (using the carrier as the reference), filtered, and buffered using isolated DC power derived from the carrier. The AD210 allows the user to select gains from 1 to 100 using an external resistor. Band width is 20 kHz, and voltage isolation is 2500 V RMS (continuous) and ±3500 V peak (continuous).
The AD210 is a 3-port isolation amplifier: the power circuitry is isolated from both the input and the output stages and may therefore be connected to either-or to nei ther. It uses transformer isolation to achieve 3500 V isolation with 12-bit accuracy.
Key specifications for the AD210 are summarized in FIG. 2.52.
A typical isolation amplifier application using the AD210 is shown in FIG. 2.53. The AD210 is used with an AD620 instrumentation amplifier in a current-sensing system for motor control. The input of the AD210, being isolated, can be connected to a 110 or 230 V power line without any protection, and the isolated ±15 V powers the AD620, which senses the voltage drop in a small current sensing resistor. The 110 or 230 V RMS com mon-mode voltage is ignored by the isolated system. The AD620 is used to improve system accuracy: the VOS of the AD210 is 15 mV, while the AD620 has VOS of 30 µV and correspondingly lower drift. If higher DC offset and drift are acceptable, the AD620 may be omitted, and the AD210 used directly at a closed loop gain of 100.
Updated: Friday, September 13, 2019 10:53 PST