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You can use the unique differential-input/digital-output characteristics of comparators to implement a wide range of circuit functions.
Perhaps the most underrated and underutilized of monolithic ICs, comparators are among the most flexible and universally applicable components in your design arsenal. With their differential linear inputs and very-fast-switching digital outputs, these devices can help you implement unusual circuit functions at favor-able cost and low component count compared with other approaches. Examples ranging from a shaft-angle encoder to a V/F converter show how you can exploit comparators' unique abilities.
Variable capacitor makes shaft-angle encoder
If, for example, you need to convert a shaft angle to a digital bit stream, you can employ Fig l's comparator-based circuit. It uses a standard AM-radio dual365-pF variable air capacitor to generate a controlling processor-triggered constant-frequency pulse burst.
Obtain shaft-angle readings with a comparator-based circuit
The burst's duration--or the number of pulses it contains--indicates shaft position to within a ±0.1% typ accuracy. Moreover, the capacitor has essentially infinite life-unlike potentiometers, which can wear quickly and require frequent replacement in high-usage applications such as video arcade games.
In operation, transistor Q1 and associated components form a ground-referred current source that linearly charges the variable capacitor. When the controlling processor needs a shaft-angle conversion, it drives the Convert line HIGH (Fig 2, trace A), turning Q2 on and discharging the capacitor. Concurrently, Qs turns on, forcing the circuit output to zero.
To continue the conversion, the processor pulls the Convert line LOW, and the constant-current-source driven capacitor voltage begins to ramp linearly toward the 15V supply (Fig 2, trace B). This Convert-line HIGH-to-LOW transition simultaneously unclamps the LF31l's output, thus triggering a pulse burst by causing the processor's clock (Fig 2, trace C) to appear as a serial bit stream at the output (Fig 2, trace D). The circuit continues to transmit this bit stream until the capacitor's voltage crosses the level established by the 5-k0/10-kfl resistor divider; at that, point the comparator output clamps, inhibiting pulses. Note that each Convert-line HIGH-to-LOW transition initiates an updated bit-stream output.
The circuit is insensitive to supply shifts because the 5V resistor-divider trip point and the current-source reference are ratiometrically-related. The FET-input comparator does not appreciably load other circuit components, so linearity is excellent. With a standard variable air capacitor (General Radio Type 722) substituted for the dual 365-pF unit, linearity is well within ±0.1%. Use the 1-MOhm potentiometer to set the desired scale factor.
Convert temperatures to bit streams
Fig 3 shows another serial-output converter, one that requires only a 5V supply. Generating this circuit's output, which indicates the temperature at the LM135 sensor, doesn't require an external command-instead, the circuit clocks itself continuously and inserts gaps in the output stream to indicate the end of one conversion and the beginning of a new one.
Q1 and 'h form a temperature-compensated current source whose output is referenced to the LM385. Q2's collector current linearly charges the 0.47-uF capacitor (Fig 4, trace A) until the ramp voltage exceeds the LM135's voltage. Then, LM339A's output goes HIGH, dumping charge into the 1000-pF capacitor and forcing LM339B's positive input (Fig 4, trace B) and output (Fig 4, trace C) HIGH. This action turns on Q3, resetting the ramp capacitor.
The 1000-pF capacitor can discharge only through the 3-MO resistor paralleling the diode at LM339A's pin 2. Therefore, the waveform at LM339B's positive input decays slowly, and the ramp capacitor stays off for an extended period of time. When the 1000-pF capacitor's LM339B's negative input, Qa, turns off, ramping begins and the cycle repeats.
Temperature-sensing scheme uses a 4-comparator IC
The oscillation frequency varies inversely with the LM135's output voltage. The ramping time, however, is directly-and linearly-proportional to the LM135's output. While the ramp is running, LM339B's output is LOW, and LM339c, which functions as a 10-kHz clock, biases LM3390 , providing the circuit's output. When LM339A's output goes HIGH, the 100-kll resistor path from LM339A to LM3390 's positive input in turn forces LM3390 's output HIGH (Fig 4, trace D). Reinforcing feedback results when LM339B's output goes HIGH and applies bias through the diode path to LM3390 's positive input. This condition lasts until the 1000-pF -capacitor voltage decays to a value sufficiently low for the cycle to repeat. The 22-kll resistor/diode path from LM339B's output to LM339c's negative input synchronizes the 10-kHz clock to the circuit's ramp reset sequence, thereby averting a ±1-count uncertainty in the output data.
A monitoring processor can use the gap in the circuit's output bit stream to synchronize itself to the temperature data. To calibrate the circuit, measure the voltage at the LM135 and adjust the 50-k-ohm potentiometer so that the number of bits in each burst relates numerically to this voltage (e.g., 2.98V=298 bits). Linearize a platinum RTD with comparators If, instead of an LM135 sensor, you're using platinum vantage of their extremely wide operating-temperature ranges and their long-term stability under adverse environmental conditions, consider the Fig 5 linearizing circuit. It overcomes an RTD's inherent nonlinearity ( >6° error from 0 to 400°C) by using an LM339 quad comparator to apply a 4-section breakpoint correction.
In contrast to other RTD-linearizing circuits, Fig 5's design needs no calibration.
Because of the RTD sensor's positive temperature coefficient, op amp LF353A's output rises with increasing temperature. Summing the output with a constant current at LF353s's negative input results in a 0V LF353B output at 0 deg. C; this output increases as a direct but nonlinear function of the RTD's temperature.
LF353B 's temperature-dependent output drives the positive inputs of the LM339 comparators and provides the input to the output gain stage, LF351c. The threshold voltages at the LM339 negative inputs cause the respective comparators to switch at the LM353s voltages corresponding to 100, 200, 300 and 350°C. When a comparator output switches HIGH, it switches in gain- and offset-changing resistors via the LF13331 JFET switches. The four slight gain adjustments compensate for the RTD's nonlinearity, and the introduced offsets ensure a monotonic increase in output as temperature rises. The 0.05-uF capacitors at the LM339 outputs prevent chattering at the trip points; the 1-uF capacitor in the LF351's feedback loop eliminates transient switching signals from the output.
If you use the Fig 5 circuit values and RTD sensor, you can obtain ±0.15 degr. C accuracy over 0 to 400°C with no trimming of any kind.
Do you have need to protect expensive components in a system-perhaps, for example, during the final phases of trimming and calibration? If so, consider the Fig 6 circuit-it shuts down power within 30 nsec of an overload occurrence (in this case, for load currents greater than 100 mA).
When the current is less than or equal to 100 mA, the LM361's output is LOW, Q1 is OFF and emitter follower Q2 sources power to the load and the 100 sense resistor.
When an overload occurs (in this case via the test circuit, whose output appears in Fig 7, trace A), the current through the 10-ohm sense resistor begins to increase. (Note the slight load-current rise in Fig 7, trace B.)
Comparator high-speed switching eases pulse-generation tasks
This rise in current produces a corresponding voltage increase at the LM361's positive input. The comparator's output then rises (Fig 7, trace C) and drives Q1 through a heavy feedforward network. Although this network 'degrades the LM361's output rise time somewhat, Q1 responds very quickly and clamps Q2's base to ground, causing load voltage (Fig 7, trace D) to immediately decay to zero.
As noted, the total elapsed time from overload onset to circuit shutdown is 30 nsec. Once the shutdown has occurred, the resistor-diode network from the LM361's pin 11 to pin 3 provides latching feedback to keep power off the load. The reset pushbutton causes a negative spike to appear at the LM361's positive input, breaking the latching feedback and allowing the loop to function normally again. Use the 5000 potentiometer to set the trip point at the desired value (for the Fig 6 circuit, 1V=100 mA).
Comparators make 2-nsec pulse generator
Similarly benefiting from the LM361's high-speed performance, the Fig 8 ultra-high-speed pulse genera tor furnishes voltage-controllable pulse widths. Its 18 differentiator networks generate a pair of pulses with slightly different durations; the comparators and a Schottky TTL gate extract the difference between two widths and present it as a single fast-rise-time pulse at the circuit output.
When you apply a positive input pulse, the two 100-pF/2-kO differentiator networks yield positive outputs. When the positive-going steps exceed the 2V threshold established by the LM103, both LM361s switch output states. For a 0V control input, the differentiator networks and the LM361s respond simultaneously, and both output transitions line up.
As you increase the control voltage, however, the spike produced by IC2's differentiator arrives at the 2V threshold earlier than does that of IC1. IC2 also normally takes longer to decay through the 2V threshold, appearing to lead to a situation in which IC2 's output would remain HIGH longer and switch earlier than would IC1 's.
IC2's 30-pF/1-kO network, however, provides a delay that shifts the IC2 output so that IC1 's leading and trailing edges occur first (Fig 9a, traces A and B). The length of time between the comparator outputs' edges depends on the input control voltage.
For the Fig 8 circuit, a 0 to 1 V control range produces a trailing-edge timing difference of 0 to 100 nsec. The DM74S08 ANDs the two comparators' outputs to obtain the single-pulse circuit output (Fig 9a, trace C).
Comparator circuit handles frequency-division chores
The gate and comparator switching speeds limit the minimum pulse width to 6 nsec; rise and fall times are approximately 2 nsec. Fig 9b shows an example of the high-speed operation that the Fig 8 circuit can achieve (control input= 100 m V). Traces A and B represent IC1 and IC2 outputs, respectively; trace C is the circuit's output pulse.
If you need a simple, inexpensive 400-Hz amplifier, consider the Fig 10 circuit. It uses ± 15V supplies, provides full bipolar swing and has a 1.5-kHz full-power bandwidth with a 6A pk output capability.
If the input voltage is negative, IC2 's output is LOW note that IC2 operates in an emitter-follower mode, so its output is in phase with its negative input), cutting Q2 off. Concurrently, IC1 's output goes LOW, turning Q1 on and thereby driving the load and the 100-kOhm resistors connected to the comparators' positive inputs.
This feedback produces a small voltage at IC1's negative input.
When the 0.01-uF capacitor charges to a level high 19 enough to offset the negative input, IC1's output changes state, turning Q1 off. At this point, the input draws current from the capacitor, forcing IC1's positive input to a lower state and consequently driving IC1 's output LOW again, turning Q1 on.
The switching action occurs continuously; repetition rate depends on the input voltage. For positive inputs, IC2 and Q2 perform similar action. To avoid cross current conduction in the output transistors, tie the comparators' offset-adjust terminals to the 15V supply.
Fig 11 trace B shows the circuit output resulting from the trace A input; the trace C waveform represents current flow in and out of the capacitor.
(Think of the IC2 pin 3 point as a digitally driven summing junction.) Trace D is a lightly filtered version of trace B; it clearly shows that the circuit output has a sinusoidal power envelope. You can vary the amplifier gain with the 10-kOhm input potentiometer.
Divide frequencies over a 1:1,000,000 range
Using the Fig 12 circuit, you can divide a frequency over a 1:106 range, adjustable via a single potentiometer. Moreover, the output frequency you obtain is synchronously related to the input frequency. You can use this circuit to obtain simultaneous oscilloscope observations of low-frequency signals and the fast clock from which they're derived or to synchronously trigger an AID converter at a variable rate.
Manipulate pulses with comparator-based circuits
The circuit functions by step-charging a capacitor with a switched current source and using a comparator to determine when to reset the capacitor. Fig 13, trace B, ·shows the step-charging waveform; each time the pulse input (Fig 13, trace A) goes LOW, a current source pulse causes a capacitor-voltage positive step.
You can control the step height--and therefore the division ratio--with the 50-kO potentiometer.
When the staircase waveform reaches the voltage at the LF311's positive input, the comparator output goes LOW (Fig 13, trace C) and stays LOW until the positive feedback through the 680-pF capacitor ceases. The delay produced· by this feedback ensures a complete reset for the 0.01-uF capacitor, which discharges through the steering diode into the comparator output.
The diode connected from LF311 pin 3 to -15V provides first-order compensation for the steering diode’s leakage effects during the charge cycle. Fig 13, trace D. shows the waveform at the LF311's positive input. Traces E and F show in an expanded time scale the relationship between the input waveforms and the step-charged ramp.
When using this circuit, remember that although the output frequency is always synchronously related to the input frequency, its absolute value can vary with time and temperature. Typically, the trip point hence, the output frequency-moves back and forth along the horizontal portion of a step at low division ratios and changes from step to step at high ratios.
Overcome TTL multivibrators' shortcomings
If you've used TTL mono-stables, you've undoubtedly noticed their poor input triggering characteristics and limited dynamic range with a given timing capacitor.
The Fig 14 circuit surmounts these limitations to provide a true level-triggered input and a single resistor-programmable 10,000:1 output-pulse range. It delivers a pre-programmed output pulse width regard less of the input pulse duration. (The minimum input trigger-pulse width is, however, 3 uSec.) When you apply an input pulse (Fig 15, trace A) to the circuit, LM393A's output goes LOW (Fig 15, trace B), producing reinforcing feedback for its own positive input (Fig 15, trace C). This causes LM3938's output to go HIGH, providing additional feedback to LM393A's positive input via the 1-MO resistor.
You program the output pulse width with one resistor.
When the 50-pF capacitor ceases to provide feedback to LM393A's positive input, this comparator's output goes HIGH, allowing the 0.01-uF timing capacitor to charge (Fig 15, trace B). When the capacitor voltage exceeds LM393B's positive input voltage, LM393B's output (Fig 15, trace D) goes LOW, terminating the output pulse.
Make a better monostable with a 2-comparator IC
With the 0.01uF timing capacitor, you can obtain output pulse widths of 10 uSec to 100 msec, with a scale factor (trimmable with the 10-kO potentiometer) of 1000/usec.
Get variable width and delay with one IC
If you need a known-width pulse that's delayed with respect to another pulse, consider the Fig 16 circuit. It works from one 5V supply and requires only one dual-comparator IC.
When you apply a TTL input (Fig 17, trace A), LM319A's output stays LOW until the 1500-pF capacitor at its positive input charges beyond the negative input's 1.2V level. The resistor-diode clamp from the circuit input to LM319A's pin 5 provides immunity to input-amplitude variations.
When LM319’s output goes HIGH (Fig 17, trace B), the transition is coupled via the 1000-pF/22-kO differentiator to LM319B's positive input (Fig 17, trace C), causing LM319B's output to rise and stay HIGH (Fig 17, trace D) until the differentiator output drops below the 1.2V level at LM319B's negative input.
You can tailor both the delay time and the output pulse width to your requirements by altering the values of the RC networks. Alternatively, you can control these parameters externally by applying variable voltages to the comparators' negative inputs.
Make an ultrafast V/F converter
Using two comparator ICs, you can build a V/F converter that yields a 5-kHz to 10-MHz output, with better than ±1% linearity, from a 0 to 5V input. The LM160's 20-nsec propagation delay allows Fig 18's circuit to run much faster than monolithic VFCs.
The LM160's output switches the 50-pF capacitor between a reference voltage (furnished by the LM385) and the comparator's negative input. The comparator's output pulse width is unimportant so long as it permits complete charging and discharging of the capacitor.
The LM160 also drives the 5-pF/510-ohm network, providing regenerative feedback to reinforce its output transitions.
When this positive feedback decays, any negative going LM160 output is followed by a positive-going edge after an interval determined by the 5-pF/510-ohm time constant (Fig 19, traces A and B).
The actual integration capacitor-the 0.01-uF unit never charges beyond 100 m V because it's constantly reset by charge dispensed from the switched 50-pF capacitor (Fig 19, trace C). When the LM160's output goes negative, the 50-pF capacitor takes charge from the 0.01-uF capacitor, resulting in a lower voltage.
The LM160's negative-going output also produces a short negative pulse--via the 5-pF/510-ohm feedback--at its positive input. When this negative pulse decays to a point where the positive input is just higher than the negative input, the 50-pF capacitor again receives a charge, and the entire cycle repeats. Diodes D1 and Dz compensate for diodes D3 and D4 , minimizing tempera ture drift.
Two comparator ICs yield a fast, linear VFC
The LM160's inverted output (Fig 19, trace D) serves as circuit output and also drives the LM311 comparator circuit to prevent LM160 lockup. Without it, any condition (such as startup and input overdrive) that allows the 0.01-uF capacitor to charge beyond its normal operating point could cause the LM160's output to go to the -5V rail and stay there.
The LM311 prevents lockup by pulling the LM160's negative input toward -5V. The 10-uF/10-k-Ohm network determines when the LM311 switches on. When the VFC runs normally, the 10-uF capacitor charges to a negligibly small voltage, holding the LM311 off. The LM160's inverted output stays HIGH if the VFC stops running (if lockup occurs), forcing the LM311 to turn on and restarting the circuit.
To calibrate the circuit, apply a 5V input and adjust the 20-kO potentiometer for a 10-MHz output. Then apply 2.5 m V and adjust the 50-kOhm potentiometer for a 5-kHz output. When building this circuit, use a ground plane and good grounding techniques and locate the components associated with the LM160 inputs as close as possible to the inputs.