Guide to Linear Analog Circuits--Sample-and-hold techniques for design solutions

Home | Articles | Forum | Glossary | Books

More than just a data-acquisition device, a S/H amplifier can also simplify--indeed, make possible--other circuit designs. The applications presented here provide a sampling of ideas ranging from data-link eavesdropping to oven control.

Most designers regard sample/hold amplifiers merely as system components utilized in high-speed data acquisition work. But they should also consider S/H devices' possibilities as circuit-oriented building blocks.

Sampling techniques can implement circuit functions that are sophisticated in performance, low in cost and not easily realized with other approaches. The designs presented here illustrate a few of the many application possibilities for S/H amplifiers as circuit elements.

Stop fiber-optic eavesdropping

Fig 1 depicts a design that detects attempts to tap a fiber-optic data link. Because the circuit works with pulse-encoded data formats, it detects only short-term changes in the fiber-optic cable's loss characteristics.

Thus, long-term changes arising from temperature variations or component aging won't trigger the alarm, but any unauthorized data extraction--a short-term phenomenon--will.

Fig 1--Fiber-optic-link eavesdropping attempts are immediately detected by this design. Working on a pulse-by-pulse comparison basis, A3 samples each input pulse and holds its amplitude value as a dc level. Anything that disturbs the next input's amplitude causes a jump in this level; because A, is an ac-coupled amplifier, the comparator and latch then activate.

Under normal operating conditions, because the input light pulse's amplitude is constant, so is the level detected by photodiode D1 and amplified by A6. A6’s constant-amplitude output pulses are sampled by the S/H amplifier, A3, which is driven by a delayed S/H pulse generated by A1 and A2. (Delaying the sampling ensures that A6’s output settles completely.) Unless something changes the input light pulse's amplitude, A6's output is a dc voltage; because A4 is ac coupled, its output is 0V.

A link-intrusion attempt disturbs the input pulse's amplitude, causing A6's output to shift. A4 AC-amplifies this shift, trips comparator A5 and activates the alarm latch.

Sample/hold techniques benefit fiber-optics usage

This sequence is represented in Fig 2, where trace A is A6's output, B tracks A3's S/H control pin and C is the alarm's output. An input disturbance occurs slightly past trace A's midpoint, indicated by A6's reduced output. The alarm's output latches HIGH just after the Sample command rises-a result of the S/H amplifier's level jumping to A6's changed output. Fig 2 shows a large disturbance (10%) for demonstration purposes, but in practice, the design can detect an energy loss of as little as 0.1%.

Stretching pulses proportionally

You can measure short-duration pulses with another S/H circuit, shown in Fig 3. The design works for either single-shot or repetitive events.

Assume that you must measure a 1-uSec-wide pulse to an accuracy of 1%. With digital techniques, this task would require use of a 100-MHz clock (1% of 1 uSec). Fig 3's design avoids this requirement by linearly amplifying the pulse's width by a factor of 1000 or more. Thus, a 1-uSec input pulse becomes a 1-msec output pulse--a somewhat easier time duration to measure to 1% accuracy.

Fig 2--An Intrusion attempt occurring just past the midpoint of trace A is immediately detected by Fig 1's circuit. The photodetector's amplifier output (A) shows a slight amplitude drop. The next time the S/H amplifier samples this signal (B), the alarm latch sets (C).

Fig 3--Pulse-width-measurement accuracy is enhanced by this pulse-stretching circuit. A short input pulse triggers the 74121 one-shot and (via Q,) discharges the 100-pF capacitor while concurrently turning on the recharging current source, Q3. So long as the input pulse is present, the capacitor charges; when the pulse ends, the capacitor's voltage is proportional to the pulse's width.

S/H amplifier A2 samples this voltage, and the resultant DC level controls the ON duration of the A.JA5 pulse-width modulator. (Letters at key points in the circuit refer to waveforms shown in Fig 4.)

Fig 4 shows how this design responds to an even shorter (350 nsec) input pulse (trace A). Comparator A1's output goes LOW (B), and the 74121-one-shot/Q1 combination discharges the associated 100-pF capacitor via a 50-nsec pulse (D). Concurrently, (h turns off, allowing current source Q3 to start linearly recharging the 100-pF capacitor (C). Charging continues until the input pulse terminates, which causes A1's output to again go HIGH and cut off the current source. The voltage across the capacitor is then directly proportion al to the input pulse width; S/H amplifier A2 samples this voltage when A3 generates the command shown by trace E. (Note the horizontal scale's change.) A3's input derives via a delay network from A1's inverting output, completing the sampling cycle.

A2's DC output voltage represents the most recently applied input pulse's width. This voltage feeds to A4, which works with A5 as a voltage-controlled pulse width modulator. A5's output ramps positive (G) until reset by a pulse from A5. (A5 goes HIGH briefly (F) each time A3's output (E) goes LOW.) To generate the circuit's final output, A4 compares A6's output with A2's and produces a HIGH level (H) for a time linearly dependent upon A2's output.

With the component values shown in Fig 3, the input-to-output time-amplification factor equals approximately 2000. Thus, a 1-uSec input yields a. 1.4-msec output. Absolute accuracy is 1% (10 nsec) referred to the input, and the measurement's resolution extends down to 2 nsec. The 74121 one-shot's 50-nsec pulse limits the minimum measurable pulse width.

Control a pulse's amplitude

S/H amplifiers also make possible the amplitude stabilized pulse generator shown in Fig 5; this circuit drives 20-ohm loads at levels as high as 10V pk. The pulse's adjustable amplitude remains stable over time, temperature and load changes.

The circuit functions by sampling the output pulse's amplitude and holding this value as a DC voltage. This voltage then connects to a feedback loop that controls the output switching devices' supply voltage.

Fig 4--A sequence of events in Fig 3's circuit stretches a 350-nsec input pulse (A) by a factor of 2000. When triggered, comparator A1 goes LOW (B). This action starts the recharging of a capacitor (C) after its previously stored charge has been dumped (D). When the input pulse ends, the capacitor's voltage is sampled under control of a delayed pulse (E) derived from the input amplifier's inverting output (F). The sampled and held voltage then turns off a voltage-controlled pulse-width modulator (G), and a stretched output pulse results (H).

Fig 5--Pulse-amplitude control results when this circuit samples an output pulse's amplitude and compares it with a preset reference level. When the output exceeds this reference, A2 readjusts switching transistor Q3's supply voltage to the correct level.

Specifically, an input TTL-level pulse turns on output drivers Q2 and Q3 and simultaneously places S/H amplifier A1 in Sample mode. When the input pulse ends, A1 outputs a DC voltage that represents the output pulse's amplitude. A2 compares this level with the one established by the Amplitude Set adjustment; A2 drives emitter follower Q1, which provides the DC supply voltage to output switches Q2 and Q3. This servo action forces the output pulses' peak amplitude to equal the "set" value, regardless of Q3's losses or output loading.

Fig 6's trace A shows the pulser's overall output wave shape, and traces B and C detail the clean 50-nsec rise and fall times. (Note the horizontal scale change.)

Fig 6--A 10V, 0.5A pulse (A) is amplitude-stabilized by the S/H technique depicted in Fig 5. Note the clean 50-nsec rise (B) and fall (C) times.

Pulse-amplitude control results from S/H designs

Input isolation made easy

Fig 7 shows a powerful extension of the pulse amplitude-control scheme that permits you to measure low-level signals (e.g., thermocouple outputs) in the presence of common-mode noise or voltages as high as 500V. Despite the input terminals' complete galvanic isolation from the output, you can expect a 0.1% transfer accuracy. And by using the optional low-level preamp (A1 ), you can measure inputs as low as 10 m V FS.

The circuit works by generating a pulse train whose amplitude is linearly related to the input signal's amplitude. This pulse train drives the input-to-output isolating transformer, T1. T1’s output, demodulated to a DC level, provides the circuit's system-ground referenced output. The pulse train's amplitude is controlled by a loop similar to the one employed in the pulse-amplitude-servo design. Here, however, the Amplitude Set doesn't appear, and the servo amplifier's + input becomes the signal input.

Set up as an oscillator, A2 generates both the sample pulse for S/H amplifier A3 and the drive for switches Q2 and Q3 (Fig 8, trace A). The feedback to the pulse-amplitude stabilizing loop comes from T1's isolated secondary-a trick that ensures highly accurate amplitude-information transfer despite T1's or Q2's losses.

Fig 7--Obtain input-signal isolation using this circuit's dual-S/H scheme. Analog input signals amplitude-modulate a pulse train using a technique similar to that employed in Fig 5's design. This modulated data is transformer coupled--and thereby isolated---to a DC filter stage, where it's resampled and reconstructed.

Fig 8--Fig 7's in-circuit oscillator (A2) generates both the sampling pulse (A) and the switching transistors' drive. Modulated by the analog input signal, Q2's (and therefore T1's) output (B) is demodulated by S/H amplifier A7. A5's output (C) and A6's input (D) and output (E) provide a delayed Sample command.

Fig 9--Completely Input-to-output isolated, Fig 7's circuit's analog input signal (A) is sampled by a clock pulse (B) and converted to a pulse-amplitude-modulated format (C). After filtering and resampling, the reconstructed signal(D) is available smoothed (E).

S/H amplifier A7 demodulates the amplitude-encoded signal at T1's output (B) back to a DC level. A5’s output (C) and A6's + input (D) and output (E) provide A1's delayed Sample command. As furnishes an optional gain-trimmed and filtered output.

Fig 10--Tight temperature control results when high-voltage pulses synchronously drive a thermistor bridge-a trick that increases signal level--and are then sampled and used to control a pulse-width-modulated heater driver.

Fig 9 illustrates the design at work. Here, the input signal (trace A) is a de-biased sine wave. Trace B shows A2's output clock pulse, and A1's Sample command appears as trace C. A7's reconstructed output is shown as trace D and A5's filtered output as trace E.

Sampling oven temperature tightens stability

Sampling holds the temperature

The S/H-based high-stability oven-temperature controller shown in Fig 10 embodies two unusual concepts:

• High-voltage, low-duty-cycle pulses drive the circuit's bridge and thus provide low power dissipation and high output levels. (In contrast, the power-dissipation limits of the resistors and thermistors in standard thermistor-bridge designs define the maximum DC bias level and therefore the maximum recoverable signal.)

• A S/H amplifier performs as a synchronous detector in the circuit's servo feedback loop. And because the sampling pulse establishes the design's reference level as well as the sampling interval, even the usual drift problems don't arise.

The circuit generates pulses via the oscillator A1/amplifier-Q1 combination, driving a standard 24V transformer (T1) "backwards." The transformer applies a floating 100V pulse across the thermistor bridge. Because one side of the bridge's output is grounded, this signal becomes the pair of complementary 50V pulses shown in Fig 11 (traces A and B).

Amplified by A2 (Fig 11, trace C), the bridge's output feeds to S/H amplifier A3, whose DC output level equals A2's peak output. (The A4 and A5 stages and their associated RC networks control the timing of A3's Sample command (D).) After low-pass filtering, A3's output (E) connects to a pulse-width modulator consisting of A5 and A7. A3's output periodically resets A1's output ramp (F). A5's output pulse (G) results from the comparison of A5's and A3's outputs and serves as the drive pulse for the heater control switch ((h). Thus, heater ON time is directly proportional to the thermistor bridge's temperature-induced unbalance.

Fig 11--Driving a thermistor bridge with complementary high-voltage pulses (A and B) permits high-gain amplification without drift problems (C). Driven by a delayed Sample command (D), a S/H amplifier converts the bridge's error signal to a DC level (E) that controls a pulse-width-modulated heater driver (F and G).

Fig 12--Tight heater-to-thermistor coupling and careful calibration can provide rapid temperature re-stabilization. Here the controlled oven recovers within 2 sec after +/- 0.002°C steps.

Fig 13--The long-term stability possible with Fig 10's circuit is demonstrated by this recording of the oven's temperature. Set at 500C, the internal temperature stays within 0.001°C even though the exterior temperature varies by 6°C.

Heater-to-thermistor thermal feedback completes the servo loop.

Oven temperature stabilizes within 2 sec

To adjust the loop's performance characteristics, apply small step changes in the temperature setpoint by switching a 1000 resistor in series with one of the bridge's resistors. (For the thermistor shown in Fig 10, this modification produces a 0.02"C change.) While monitoring the loop's response at A3's output, adjust the Gain and Time Constant potentiometers for minimum settling time.

Fig 12 shows how the system stabilizes within 2 sec for both positive and negative steps. And Fig 13 demonstrates the design's very tight temperature control capability. Set at 50°C, the oven's interior temperature varies by less than 0.001°C even when the ambient temperature changes by 6°C. Although Fig 13 shows only a a few hours of operation, the circuit continued this performance over a 48-hr test period.

Top of Page

PREV. NEXT Article Index HOME